forked from Github_Repos/cvw
Config cleanup
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@ -26,7 +26,7 @@
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`include "wally-constants.vh"
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// macros to define supported modes
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// NOTE: No hardware support fo Q yet
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// NOTE: No hardware support foR Q yet
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`define A_SUPPORTED ((`MISA >> 0) % 2 == 1)
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`define C_SUPPORTED ((`MISA >> 2) % 2 == 1)
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@ -113,17 +113,17 @@
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`define DIVCOPIES 32'h3
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`define DIVLEN ((`NF < `XLEN) ? (`XLEN) : (`NF + 3))
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// `define DIVN (`NF < `XLEN ? `XLEN : `NF+1) // length of input
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`define DIVN (`NF < `XLEN ? `XLEN : `NF+3) // length of input
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`define EXTRAFRACBITS ((`NF<(`XLEN)) ? (`XLEN - `NF) : 3)
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`define EXTRAINTBITS ((`NF<(`XLEN)) ? 0 : (`NF - `XLEN + 3))
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`define DIVRESLEN ((`NF>`XLEN) ? `NF+4 : `XLEN)
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`define DIVN (`NF < `XLEN ? `XLEN : (`NF + 3)) // length of input
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`define EXTRAFRACBITS ((`NF < (`XLEN)) ? (`XLEN - `NF) : 3)
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`define EXTRAINTBITS ((`NF < `XLEN) ? 0 : (`NF - `XLEN + 3))
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`define DIVRESLEN ((`NF>`XLEN) ? (`NF + 4) : `XLEN)
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`define LOGR ((`RADIX==2) ? 32'h1 : 32'h2)
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// FPDUR = ceil(DIVRESLEN/(LOGR*DIVCOPIES))
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// one interation is required for the integer bit for minimally redundent radix-4
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// one iteration is required for the integer bit for minimally redundent radix-4
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`define FPDUR ((`DIVN+2+(`LOGR*`DIVCOPIES)-1)/(`LOGR*`DIVCOPIES)+(`RADIX/4))
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`define DURLEN ($clog2(`FPDUR+1))
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`define QLEN (`FPDUR*`LOGR*`DIVCOPIES)
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`define DIVb (`FPDUR*`LOGR*`DIVCOPIES)-1
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`define DIVb (`QLEN - 1)
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`define USE_SRAM 0
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