forked from Github_Repos/cvw
fixed indent spacing (cosmetic change)
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@ -87,7 +87,7 @@ logic [3:0] dummy;
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"arch64m": if (`M_SUPPORTED) tests = arch64m;
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"arch64m": if (`M_SUPPORTED) tests = arch64m;
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"arch64d": if (`D_SUPPORTED) tests = arch64d;
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"arch64d": if (`D_SUPPORTED) tests = arch64d;
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"imperas64i": tests = imperas64i;
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"imperas64i": tests = imperas64i;
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// "imperas64mmu": if (`VIRTMEM_SUPPORTED) tests = imperas64mmu;
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//"imperas64mmu": if (`VIRTMEM_SUPPORTED) tests = imperas64mmu;
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"imperas64f": if (`F_SUPPORTED) tests = imperas64f;
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"imperas64f": if (`F_SUPPORTED) tests = imperas64f;
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"imperas64d": if (`D_SUPPORTED) tests = imperas64d;
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"imperas64d": if (`D_SUPPORTED) tests = imperas64d;
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"imperas64m": if (`M_SUPPORTED) tests = imperas64m;
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"imperas64m": if (`M_SUPPORTED) tests = imperas64m;
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@ -110,7 +110,7 @@ logic [3:0] dummy;
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"arch32m": if (`M_SUPPORTED) tests = arch32m;
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"arch32m": if (`M_SUPPORTED) tests = arch32m;
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"arch32f": if (`F_SUPPORTED) tests = arch32f;
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"arch32f": if (`F_SUPPORTED) tests = arch32f;
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"imperas32i": tests = imperas32i;
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"imperas32i": tests = imperas32i;
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// "imperas32mmu": if (`VIRTMEM_SUPPORTED) tests = imperas32mmu;
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//"imperas32mmu": if (`VIRTMEM_SUPPORTED) tests = imperas32mmu;
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"imperas32f": if (`F_SUPPORTED) tests = imperas32f;
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"imperas32f": if (`F_SUPPORTED) tests = imperas32f;
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"imperas32m": if (`M_SUPPORTED) tests = imperas32m;
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"imperas32m": if (`M_SUPPORTED) tests = imperas32m;
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"wally32a": if (`A_SUPPORTED) tests = wally32a;
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"wally32a": if (`A_SUPPORTED) tests = wally32a;
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@ -183,7 +183,7 @@ logic [3:0] dummy;
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// read test vectors into memory
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// read test vectors into memory
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pathname = tvpaths[tests[0].atoi()];
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pathname = tvpaths[tests[0].atoi()];
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/* if (tests[0] == `IMPERASTEST)
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/* if (tests[0] == `IMPERASTEST)
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pathname = tvpaths[0];
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pathname = tvpaths[0];
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else pathname = tvpaths[1]; */
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else pathname = tvpaths[1]; */
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memfilename = {pathname, tests[test], ".elf.memfile"};
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memfilename = {pathname, tests[test], ".elf.memfile"};
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@ -255,7 +255,7 @@ logic [3:0] dummy;
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//if (signature[i] !== dut.core.lsu.dtim.ram.memory.RAM[testadr+i] &
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//if (signature[i] !== dut.core.lsu.dtim.ram.memory.RAM[testadr+i] &
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(signature[i] !== DCacheFlushFSM.ShadowRAM[testadr+i])) begin // ***i+1?
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(signature[i] !== DCacheFlushFSM.ShadowRAM[testadr+i])) begin // ***i+1?
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if ((signature[i] !== '0 | signature[i+4] !== 'x)) begin
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if ((signature[i] !== '0 | signature[i+4] !== 'x)) begin
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// if (signature[i+4] !== 'bx | (signature[i] !== 32'hFFFFFFFF & signature[i] !== 32'h00000000)) begin
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// if (signature[i+4] !== 'bx | (signature[i] !== 32'hFFFFFFFF & signature[i] !== 32'h00000000)) begin
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// report errors unless they are garbage at the end of the sim
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// report errors unless they are garbage at the end of the sim
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// kind of hacky test for garbage right now
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// kind of hacky test for garbage right now
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$display("sig4 = %h ne %b", signature[i+4], signature[i+4] !== 'bx);
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$display("sig4 = %h ne %b", signature[i+4], signature[i+4] !== 'bx);
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@ -368,7 +368,7 @@ module riscvassertions;
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assert (`ZICSR_SUPPORTED == 1 | (`PMP_ENTRIES == 0 & `VIRTMEM_SUPPORTED == 0)) else $error("PMP_ENTRIES and VIRTMEM_SUPPORTED must be zero if ZICSR not supported.");
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assert (`ZICSR_SUPPORTED == 1 | (`PMP_ENTRIES == 0 & `VIRTMEM_SUPPORTED == 0)) else $error("PMP_ENTRIES and VIRTMEM_SUPPORTED must be zero if ZICSR not supported.");
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assert (`ZICSR_SUPPORTED == 1 | (`S_SUPPORTED == 0 & `U_SUPPORTED == 0)) else $error("S and U modes not supported if ZISR not supported");
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assert (`ZICSR_SUPPORTED == 1 | (`S_SUPPORTED == 0 & `U_SUPPORTED == 0)) else $error("S and U modes not supported if ZISR not supported");
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assert (`U_SUPPORTED | (`S_SUPPORTED == 0)) else $error ("S mode only supported if U also is supported");
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assert (`U_SUPPORTED | (`S_SUPPORTED == 0)) else $error ("S mode only supported if U also is supported");
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// assert (`MEM_DCACHE == 0 | `MEM_DTIM == 0) else $error("Can't simultaneously have a data cache and TIM");
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// assert (`MEM_DCACHE == 0 | `MEM_DTIM == 0) else $error("Can't simultaneously have a data cache and TIM");
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assert (`DMEM == `MEM_CACHE | `VIRTMEM_SUPPORTED ==0) else $error("Virtual memory needs dcache");
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assert (`DMEM == `MEM_CACHE | `VIRTMEM_SUPPORTED ==0) else $error("Virtual memory needs dcache");
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assert (`IMEM == `MEM_CACHE | `VIRTMEM_SUPPORTED ==0) else $error("Virtual memory needs icache");
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assert (`IMEM == `MEM_CACHE | `VIRTMEM_SUPPORTED ==0) else $error("Virtual memory needs icache");
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//assert (`DMEM == `MEM_CACHE | `DBUS ==0) else $error("Dcache rquires DBUS.");
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//assert (`DMEM == `MEM_CACHE | `DBUS ==0) else $error("Dcache rquires DBUS.");
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@ -447,8 +447,6 @@ module DCacheFlushFSM
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end
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end
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end
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end
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end
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end
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end
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end
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flop #(1) doneReg(.clk, .d(start), .q(done));
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flop #(1) doneReg(.clk, .d(start), .q(done));
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endmodule
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endmodule
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