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Cleanup comments.

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This commit is contained in:
Ross Thompson 2022-12-16 17:08:35 -06:00
parent 89a30e7e37
commit 7d04675073
1 changed files with 0 additions and 2 deletions
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pipelined/src/lsu/lsu.sv
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@ -31,7 +31,6 @@
////////////////////////////////////////////////////////////////////////////////////////////////
// committed means the memory operation in flight cannot be interrupted.
// cpubusy means the cpu is stalled and the lsu must ensure ReadDataM stalls constant until the stall is removed.
// chap 5 handling faults to memory by delaying writes to memory stage.
// chap 6 combing bus with dtim
// chap 9 complete lsu.
@ -285,7 +284,6 @@ module lsu (
logic [1:0] BusRW;
logic [`XLEN-1:0] FetchBuffer;
assign BusRW = ~IgnoreRequestTLB & ~SelDTIM ? LSURWM : '0;
// assign BusRW = LSURWM & ~{IgnoreRequest, IgnoreRequest} & ~{SelDTIM, SelDTIM};
assign LSUHADDR = PAdrM;
assign LSUHSIZE = LSUFunct3M;