forked from Github_Repos/cvw
		
	Third attempt at fixing the write enables for the icache cacheway.
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								wally-pipelined/src/cache/icache.sv
									
									
									
									
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							@ -142,7 +142,7 @@ module icache
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			 .RAdr(RAdr),
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			 .PAdr(PCTagF),
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			 .WriteEnable(SRAMWayWriteEnable), 
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			 .WriteWordEnable({NUMWAYS{1'b1}}),
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			 .WriteWordEnable({{(BLOCKLEN/`XLEN){1'b1}}}),
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			 .TagWriteEnable(SRAMWayWriteEnable),
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			 .WriteData(ICacheMemWriteData),
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			 .SetValid(ICacheMemWriteEnable),
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