uncore cleanup

pipelined/src/uncore/ahbapbbridge.sv

@@ -52,7 +52,6 @@ module ahbapbbridge #(PERIPHS = 2) (
   input  var   [PERIPHS-1:0][`XLEN-1:0] PRDATA
 );
 
-
   logic                       initTrans, initTransSel, initTransSelD;
   logic                       nextPENABLE;
   logic                       PREADYOUT;

pipelined/src/uncore/clint_apb.sv

@@ -40,10 +40,10 @@ module clint_apb (
   output logic [`XLEN-1:0]    PRDATA,
   output logic                PREADY,
   (* mark_debug = "true" *) output logic [63:0] MTIME, 
-  output logic 			   MTimerInt, MSwInt);
+  output logic 			          MTimerInt, MSwInt
+);
 
   logic                       MSIP;
-
   logic [15:0]                entry;
   logic                       memwrite;
    (* mark_debug = "true" *)    logic [63:0] MTIMECMP;

pipelined/src/uncore/gpio_apb.sv

@@ -43,13 +43,13 @@ module gpio_apb (
   input  logic [31:0]       iof0, iof1,
   input  logic [31:0]       GPIOPinsIn,
   output logic [31:0]       GPIOPinsOut, GPIOPinsEn,
-  output logic             GPIOIntr);
+  output logic              GPIOIntr
+);
 
   logic [31:0]              input0d, input1d, input2d, input3d;
   logic [31:0]              input_val, input_en, output_en, output_val;
   logic [31:0]              rise_ie, rise_ip, fall_ie, fall_ip, high_ie, high_ip, low_ie, low_ip; 
   logic [31:0]              out_xor, iof_en, iof_sel, iof_out, gpio_out;
-
   logic [7:0]               entry;
   logic [31:0]              Din, Dout;
   logic                     memwrite;

pipelined/src/uncore/plic_apb.sv

@@ -38,11 +38,11 @@
 `define N `PLIC_NUM_SRC
 // number of interrupt sources
 // does not include source 0, which does not connect to anything according to spec
-// up to 63 sources supported; *** in the future, allow up to 1023 sources
+// up to 63 sources supported; in the future, allow up to 1023 sources
 
 `define C 2
 // number of conexts
-// hardcoded to 2 contexts for now; *** later upgrade to arbitrary (up to 15872) contexts
+// hardcoded to 2 contexts for now; later upgrade to arbitrary (up to 15872) contexts
 
 module plic_apb (
   input  logic             PCLK, PRESETn,
@@ -55,7 +55,8 @@ module plic_apb (
   output logic [`XLEN-1:0] PRDATA,
   output logic             PREADY,
   input  logic             UARTIntr,GPIOIntr,
-    (* mark_debug = "true" *)  output logic             MExtInt, SExtInt);
+    (* mark_debug = "true" *)  output logic             MExtInt, SExtInt
+);
 
   logic memwrite, memread;
   logic [23:0] entry;

pipelined/src/uncore/uart_apb.sv

@@ -56,17 +56,6 @@ module uart_apb (
   assign MEMRb = ~memread;
   assign MEMWb = ~memwrite;
 
-/*
-  // rename processor interface signals to match PC16550D and provide one-byte interface
-  flopr #(1)  memreadreg(HCLK, ~HRESETn, (HSELUART & ~HWRITE), memread);
-  flopr #(1) memwritereg(HCLK, ~HRESETn, (HSELUART &  HWRITE), memwrite);
-  flopr #(3)   haddrreg(HCLK, ~HRESETn, HADDR[2:0], A);
-  assign MEMRb = ~memread;
-  assign MEMWb = ~memwrite;
-
-  assign HRESPUART = 0; // OK
-  assign HREADYUART = 1; // should idle high during address phase and respond high when done; will need to be modified if UART ever needs more than 1 cycle to do something
-*/
   if (`XLEN == 64) begin:uart
     always_comb begin
       PRDATA = {Dout, Dout, Dout, Dout, Dout, Dout, Dout, Dout};