Update testbench.sv

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David Harris 2023-02-16 17:54:27 -08:00 committed by GitHub
parent 532abb5b95
commit 631008f06a
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@ -281,7 +281,7 @@ logic [3:0] dummy;
// once the test inidicates it's done we need to immediately hold reset for a number of cycles.
if(ResetCount < ResetThreshold) ResetCount = ResetCount + 1;
else begin // hit reset threshold so we remove reset.
InReset = 0;
//InReset = 0;
ResetCount = 0;
end
end else begin