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Make CacheWay flush and dirty logic dependent on !READ_ONLY_CACHE

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To increase coverage. Read-only caches do not have flushes since
they do not have dirty bits.
This commit is contained in:
Alec Vercruysse 2023-04-05 11:46:28 -07:00
parent d3a988c96c
commit 61e19c2ddf
1 changed files with 23 additions and 13 deletions
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36
src/cache/cacheway.sv vendored
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@ -74,17 +74,22 @@ module cacheway #(parameter NUMLINES=512, LINELEN = 256, TAGLEN = 26,
logic ClearDirtyWay; logic ClearDirtyWay;
logic SelNonHit; logic SelNonHit;
logic SelData; logic SelData;
logic FlushWayEn, VictimWayEn;
// FlushWay and VictimWay are part of a one hot way selection. Must clear them if FlushWay not selected
// or VictimWay not selected. if (!READ_ONLY_CACHE) begin:flushlogic
assign FlushWayEn = FlushWay & SelFlush; logic FlushWayEn;
assign VictimWayEn = VictimWay & SelWriteback;
mux2 #(1) seltagmux(VictimWay, FlushWay, SelFlush, SelTag);
assign SelNonHit = FlushWayEn | SetValid | SelWriteback;
// FlushWay is part of a one hot way selection. Must clear it if FlushWay not selected.
mux2 #(1) seltagmux(VictimWay, FlushWay, SelFlush, SelTag); assign FlushWayEn = FlushWay & SelFlush;
assign SelNonHit = FlushWayEn | SetValid | SelWriteback;
end
else begin:flushlogic // no flush operation for read-only caches.
assign SelTag = VictimWay;
assign SelNonHit = SetValid;
end
mux2 #(1) selectedwaymux(HitWay, SelTag, SelNonHit , SelData); mux2 #(1) selectedwaymux(HitWay, SelTag, SelNonHit , SelData);
///////////////////////////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////////////////////////
@ -92,11 +97,16 @@ module cacheway #(parameter NUMLINES=512, LINELEN = 256, TAGLEN = 26,
///////////////////////////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////////////////////////
assign SetValidWay = SetValid & SelData; assign SetValidWay = SetValid & SelData;
assign SetDirtyWay = SetDirty & SelData;
assign ClearDirtyWay = ClearDirty & SelData; assign ClearDirtyWay = ClearDirty & SelData;
if (!READ_ONLY_CACHE) begin
assign SetDirtyWay = SetDirty & SelData;
assign SelectedWriteWordEn = (SetValidWay | SetDirtyWay) & ~FlushStage;
end
else begin
assign SelectedWriteWordEn = SetValidWay & ~FlushStage;
end
// If writing the whole line set all write enables to 1, else only set the correct word. // If writing the whole line set all write enables to 1, else only set the correct word.
assign SelectedWriteWordEn = (SetValidWay | SetDirtyWay) & ~FlushStage;
assign FinalByteMask = SetValidWay ? '1 : LineByteMask; // OR assign FinalByteMask = SetValidWay ? '1 : LineByteMask; // OR
assign SetValidEN = SetValidWay & ~FlushStage; assign SetValidEN = SetValidWay & ~FlushStage;