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lint fixes

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This commit is contained in:
Kevin Kim 2023-02-11 21:13:10 -08:00
parent 6a7fe6352e
commit 5f08322e99
3 changed files with 17 additions and 26 deletions
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24
src/ieu/alu.sv
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@ -57,14 +57,14 @@ module alu #(parameter WIDTH=32) (
// Addition // Addition
if (`ZBB_SUPPORTED) if (`ZBB_SUPPORTED)
always_comb begin always_comb begin
case({Funct7, Funct3}) case({Funct7, Funct3, W64})
10'b0010000_010: CondShiftA = {A[WIDTH-1:1], {1'b0}}; //sh1add 11'b0010000_010_0: CondShiftA = {A[WIDTH-1:1], {1'b0}}; //sh1add
10'b0010000_100: CondShiftA = {A[WIDTH-1:2], {2'b00}}; //sh2add 11'b0010000_100_0: CondShiftA = {A[WIDTH-1:2], {2'b00}}; //sh2add
10'b0010000_110: CondShiftA = {A[WIDTH-1:3], {3'b000}}; //sh3add 11'b0010000_110_0: CondShiftA = {A[WIDTH-1:3], {3'b000}}; //sh3add
10'b0000100_000: CondShiftA = {{32{1'b0}}, A[31:0]}; //add.uw 11'b0000100_000_1: CondShiftA = {{32{1'b0}}, A[31:0]}; //add.uw
10'b0010000_010: CondShiftA = {{31{1'b0}},A[31:0], {1'b0}}; //sh1add.uw 11'b0010000_010_1: CondShiftA = {{31{1'b0}},A[31:0], {1'b0}}; //sh1add.uw
10'b0010000_100: CondShiftA = {{30{1'b0}},A[31:0], {2'b0}}; //sh2add.uw 11'b0010000_100_1: CondShiftA = {{30{1'b0}},A[31:0], {2'b0}}; //sh2add.uw
10'b0010000_110: CondShiftA = {{29{1'b0}},A[31:0], {3'b0}}; //sh3add.uw 11'b0010000_110_1: CondShiftA = {{29{1'b0}},A[31:0], {3'b0}}; //sh3add.uw
default: CondShiftA = A; default: CondShiftA = A;
endcase endcase
@ -76,13 +76,9 @@ module alu #(parameter WIDTH=32) (
endcase endcase
casez ({Funct7, Funct3}) casez ({Funct7, Funct3})
10'b0110000_101: Rotate = 1'b1;
10'b011000?_101: Rotate = 1'b1; 10'b011000?_101: Rotate = 1'b1;
10'b000010?_001: Rotate = 1'b0; 10'b000010?_001: Rotate = 1'b0;
10'b0110000_001: Rotate = 1'b1; 10'b0110000_001: Rotate = 1'b1;
10'b0110000_101: Rotate = 1'b1;
10'b0110000_001: Rotate = 1'b1;
10'b0110000_101: Rotate = 1'b1;
default: Rotate = 1'b0; default: Rotate = 1'b0;
endcase endcase
end end
@ -126,12 +122,12 @@ module alu #(parameter WIDTH=32) (
endcase endcase
if (`ZBS_SUPPORTED) if (`ZBS_SUPPORTED)
zbs zbs(.A, .B, .Funct7, .Funct3, .ZBSResult); zbs #(WIDTH) zbs(.A, .B, .Funct7, .Funct3, .ZBSResult);
else assign ZBSResult = 0; else assign ZBSResult = 0;
if (`ZBB_SUPPORTED) if (`ZBB_SUPPORTED)
zbb zbb(.A, .B, .Funct3, .Funct7, .W64, .ZBBResult); zbb #(WIDTH) zbb(.A, .B, .Funct3, .Funct7, .W64, .ZBBResult);
else assign ZBBResult = 0; else assign ZBBResult = 0;
// Support RV64I W-type addw/subw/addiw/shifts that discard upper 32 bits and sign-extend 32-bit result to 64 bits // Support RV64I W-type addw/subw/addiw/shifts that discard upper 32 bits and sign-extend 32-bit result to 64 bits

12
src/ieu/bmu/popcnt.sv
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@ -31,20 +31,14 @@ module popcnt #(parameter WIDTH = 32) (
logic [$clog2(WIDTH):0] sum; logic [$clog2(WIDTH):0] sum;
/*always_comb begin always_comb begin
sum = 0; sum = 0;
for (int i=0;i<WIDTH;i++) begin:loop for (int i=0;i<WIDTH;i++) begin:loop
sum = sum + num[i]; sum = (num[i]) ? sum + 1 : sum;
end end
end end
*/
genvar i;
for (i=0;i<WIDTH;i++) begin:loop
assign sum = sum + {{5'b0},num[i]};
end
assign PopCnt = sum; assign PopCnt = sum[$clog2(WIDTH):0];
endmodule endmodule

7
src/ieu/bmu/zbb.sv
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@ -52,9 +52,9 @@ module zbb #(parameter WIDTH=32) (
logic [WIDTH-1:0] sextbResult; // sign extend byte result logic [WIDTH-1:0] sextbResult; // sign extend byte result
logic [WIDTH-1:0] zexthResult; // zero extend halfword result logic [WIDTH-1:0] zexthResult; // zero extend halfword result
cnt cnt(.A(A), .B(B), .W64(W64), .czResult(czResult), .cpopResult(cpopResult)); cnt #(WIDTH) cnt(.A(A), .B(B), .W64(W64), .czResult(czResult), .cpopResult(cpopResult));
byteUnit bu(.A(A), .OrcBResult(OrcBResult), .Rev8Result(Rev8Result)); byteUnit #(WIDTH) bu(.A(A), .OrcBResult(OrcBResult), .Rev8Result(Rev8Result));
ext ext(.A(A), .sexthResult(sexthResult), .sextbResult(sextbResult), .zexthResult(zexthResult)); ext #(WIDTH) ext(.A(A), .sexthResult(sexthResult), .sextbResult(sextbResult), .zexthResult(zexthResult));
//can replace with structural mux by looking at bit 4 in rs2 field //can replace with structural mux by looking at bit 4 in rs2 field
always_comb begin always_comb begin
@ -68,6 +68,7 @@ module zbb #(parameter WIDTH=32) (
15'b0000100_100_00000: ZBBResult = zexthResult; 15'b0000100_100_00000: ZBBResult = zexthResult;
15'b0110000_001_00100: ZBBResult = sextbResult; 15'b0110000_001_00100: ZBBResult = sextbResult;
15'b0110000_001_00101: ZBBResult = sexthResult; 15'b0110000_001_00101: ZBBResult = sexthResult;
default: ZBBResult = {(WIDTH){1'b0}};
endcase endcase
end end