add tracegen support for interrupt parsing

This commit is contained in:
bbracker 2022-02-09 02:29:47 +00:00
parent b4d6cc49e6
commit 5669b9d1ca
3 changed files with 30 additions and 9 deletions

View File

@ -4,10 +4,12 @@ imageDir=$RISCV/buildroot/output/images
outDir=$RISCV/linux-testvectors outDir=$RISCV/linux-testvectors
recordFile="$outDir/all.qemu" recordFile="$outDir/all.qemu"
traceFile="$outDir/all.txt" traceFile="$outDir/all.txt"
interruptsFile="$outDir/interrupts.txt"
read -p "Warning: running this script will overwrite the contents of: read -p "Warning: running this script will overwrite the contents of:
* $recordFile * $recordFile
* $traceFile * $traceFile
* $interruptsFile
Would you like to proceed? (y/n) " -n 1 -r Would you like to proceed? (y/n) " -n 1 -r
echo echo
if [[ $REPLY =~ ^[Yy]$ ]] if [[ $REPLY =~ ^[Yy]$ ]]
@ -17,8 +19,10 @@ then
sudo chown cad $outDir sudo chown cad $outDir
sudo touch $recordFile sudo touch $recordFile
sudo touch $traceFile sudo touch $traceFile
sudo touch $interruptsFile
sudo chmod a+rw $recordFile sudo chmod a+rw $recordFile
sudo chmod a+rw $traceFile sudo chmod a+rw $traceFile
sudo chmod a+rw $interruptsFile
# Compile Devicetree from Source # Compile Devicetree from Source
dtc -I dts -O dtb ../devicetree/virt-trimmed.dts > ../devicetree/virt-trimmed.dtb dtc -I dts -O dtb ../devicetree/virt-trimmed.dts > ../devicetree/virt-trimmed.dtb
@ -29,15 +33,17 @@ then
-nographic -serial /dev/null \ -nographic -serial /dev/null \
-bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio \ -bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio \
-singlestep -rtc clock=vm -icount shift=0,align=off,sleep=on,rr=record,rrfile=$recordFile \ -singlestep -rtc clock=vm -icount shift=0,align=off,sleep=on,rr=record,rrfile=$recordFile \
-d nochain,cpu,in_asm \ -d nochain,cpu,in_asm,int \
-gdb tcp::$tcpPort -S \ -gdb tcp::$tcpPort -S \
2>&1 >/dev/null | ./parseQemuToGDB.py | ./parseGDBtoTrace.py | ./remove_dup.awk > $traceFile) \ 2>&1 >/dev/null | ./parseQemuToGDB.py | ./parseGDBtoTrace.py $interruptsFile | ./remove_dup.awk > $traceFile) \
& riscv64-unknown-elf-gdb -quiet -x genTrace.gdb -ex "genTrace $tcpPort \"$imageDir/vmlinux\"" & riscv64-unknown-elf-gdb -quiet -x genTrace.gdb -ex "genTrace $tcpPort \"$imageDir/vmlinux\""
# Cleanup # Cleanup
sudo chown cad $recordFile sudo chown cad $recordFile
sudo chown cad $traceFile sudo chown cad $traceFile
sudo chown cad $interruptsFile
sudo chmod o-w $recordFile sudo chmod o-w $recordFile
sudo chmod o-w $traceFile sudo chmod o-w $traceFile
sudo chmod o-w $interruptsFile
fi fi

View File

@ -130,6 +130,13 @@ def PrintInstr(instr, fp):
fp.write(' CSR {}'.format(CSRStr)) fp.write(' CSR {}'.format(CSRStr))
fp.write('\n') fp.write('\n')
# =========
# Main Code
# =========
# Parse argument for interrupt file
if len(sys.argv) != 2:
sys.exit('Error parseGDBtoTrace.py expects 1 arg:\n <interrupt filename>>')
interruptFname = sys.argv[1]
# reg number # reg number
RegNumber = {'zero': 0, 'ra': 1, 'sp': 2, 'gp': 3, 'tp': 4, 't0': 5, 't1': 6, 't2': 7, 's0': 8, 's1': 9, 'a0': 10, 'a1': 11, 'a2': 12, 'a3': 13, 'a4': 14, 'a5': 15, 'a6': 16, 'a7': 17, 's2': 18, 's3': 19, 's4': 20, 's5': 21, 's6': 22, 's7': 23, 's8': 24, 's9': 25, 's10': 26, 's11': 27, 't3': 28, 't4': 29, 't5': 30, 't6': 31, 'mhartid': 32, 'mstatus': 33, 'mip': 34, 'mie': 35, 'mideleg': 36, 'medeleg': 37, 'mtvec': 38, 'stvec': 39, 'mepc': 40, 'sepc': 41, 'mcause': 42, 'scause': 43, 'mtval': 44, 'stval': 45} RegNumber = {'zero': 0, 'ra': 1, 'sp': 2, 'gp': 3, 'tp': 4, 't0': 5, 't1': 6, 't2': 7, 's0': 8, 's1': 9, 'a0': 10, 'a1': 11, 'a2': 12, 'a3': 13, 'a4': 14, 'a5': 15, 'a6': 16, 'a7': 17, 's2': 18, 's3': 19, 's4': 20, 's5': 21, 's6': 22, 's7': 23, 's8': 24, 's9': 25, 's10': 26, 's11': 27, 't3': 28, 't4': 29, 't5': 30, 't6': 31, 'mhartid': 32, 'mstatus': 33, 'mip': 34, 'mie': 35, 'mideleg': 36, 'medeleg': 37, 'mtvec': 38, 'stvec': 39, 'mepc': 40, 'sepc': 41, 'mcause': 42, 'scause': 43, 'mtval': 44, 'stval': 45}
# initial state # initial state
@ -144,14 +151,23 @@ numInstrs = 0
#instructions = [] #instructions = []
MemAdr = 0 MemAdr = 0
lines = [] lines = []
interrupts=open('interrupts.txt','w') interrupts=open(interruptFname,'w')
interrupts.close() interrupts.close()
for line in fileinput.input('-'): for line in fileinput.input('-'):
if line.startswith('riscv_cpu_do_interrupt'): if line.startswith('riscv_cpu_do_interrupt'):
with open('interrupts.txt','a') as interrupts: with open(interruptFname,'a') as interrupts:
interrupts.write(str(numInstrs)+': '+line.strip('riscv_cpu_do_interrupt')) # Write line
break # Example line: hart:0, async:0, cause:0000000000000002, epc:0x0000000080008548, tval:0x0000000000000000, desc=illegal_instruction
interrupts.write(line)
# Write instruction count
interrupts.write(str(numInstrs)+'\n')
# Convert line to rows of info for easier Verilog parsing
vals=line.strip('riscv_cpu_do_interrupt: ').strip('\n').split(',')
vals=[val.split(':')[-1].strip(' ').strip('desc=') for val in vals]
for val in vals:
interrupts.write(val+'\n')
continue
lines.insert(lineNum, line) lines.insert(lineNum, line)
if InstrStartDelim in line: if InstrStartDelim in line:
lineNum = 0 lineNum = 0
@ -204,8 +220,8 @@ for line in fileinput.input('-'):
#instructions.append(MoveInstrToRegWriteLst) #instructions.append(MoveInstrToRegWriteLst)
PrintInstr(MoveInstrToRegWriteLst, sys.stdout) PrintInstr(MoveInstrToRegWriteLst, sys.stdout)
numInstrs +=1 numInstrs +=1
if (numInstrs % 1e4 == 0): if (numInstrs % 1e5 == 0):
sys.stderr.write('Trace parser reached '+str(numInstrs/1.0e6)+' million instrs.\n') sys.stderr.write('GDB trace parser reached '+str(numInstrs/1.0e6)+' million instrs.\n')
sys.stderr.flush() sys.stderr.flush()
lineNum += 1 lineNum += 1

View File

@ -115,7 +115,6 @@ for l in fileinput.input():
if l.startswith('riscv_cpu_do_interrupt'): if l.startswith('riscv_cpu_do_interrupt'):
sys.stderr.write(l) sys.stderr.write(l)
interrupt_line = l.strip('\n') interrupt_line = l.strip('\n')
continue
elif l.startswith('qemu-system-riscv64: QEMU: Terminated via GDBstub'): elif l.startswith('qemu-system-riscv64: QEMU: Terminated via GDBstub'):
break break
elif l.startswith('IN:'): elif l.startswith('IN:'):