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some fpu lint warnings fixed - still working on it

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This commit is contained in:
Katherine Parry 2021-10-11 18:32:03 -07:00
parent 7873ba7867
commit 539d21645f
4 changed files with 10 additions and 10 deletions
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14
wally-pipelined/src/fpu/cvtfp.sv
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@ -35,8 +35,8 @@ module cvtfp (
logic [12:0] DExpCalc; logic [12:0] DExpCalc;
// logic Overflow, Underflow; // logic Overflow, Underflow;
assign DExpCalc = (XExpE-1023+127)&{13{~XZeroE}}; assign DExpCalc = ({2'b0,XExpE}-13'd1023+13'd127)&{13{~XZeroE}};
assign Denorm = $signed(DExpCalc) <= 0 & $signed(DExpCalc) > $signed(-23); assign Denorm = $signed(DExpCalc) <= 0 & $signed(DExpCalc) > $signed(-(13'd23));
logic [12:0] ShiftCnt; logic [12:0] ShiftCnt;
logic [51:0] SFrac; logic [51:0] SFrac;
@ -45,7 +45,7 @@ module cvtfp (
//assign ShiftCnt = FmtE ? -DExpCalc&{13{Denorm}} : NormCnt; //assign ShiftCnt = FmtE ? -DExpCalc&{13{Denorm}} : NormCnt;
assign SFrac = XManE[51:0] << NormCnt; assign SFrac = XManE[51:0] << NormCnt;
logic Shift; logic Shift;
assign Shift = {13{Denorm|(($signed(DExpCalc) > $signed(-25)) & DExpCalc[12])}}; assign Shift = Denorm | (($signed(DExpCalc) > $signed(-(13'd25))) & DExpCalc[12]);
assign DFracTmp = {XManE, 25'b0} >> ((-DExpCalc+1)&{13{Shift}}); assign DFracTmp = {XManE, 25'b0} >> ((-DExpCalc+1)&{13{Shift}});
assign DFrac = DFracTmp[76:51]; assign DFrac = DFracTmp[76:51];
@ -93,19 +93,19 @@ assign DFrac = DFracTmp[76:51];
logic [12:0] DExpFull; logic [12:0] DExpFull;
logic [22:0] DResFrac; logic [22:0] DResFrac;
logic [7:0] DResExp; logic [7:0] DResExp;
assign {DExpFull, DResFrac} = {DExpCalc&{13{~Denorm}}, DFrac[25:3]} + Plus1; assign {DExpFull, DResFrac} = {DExpCalc&{13{~Denorm}}, DFrac[25:3]} + {35'b0,Plus1};
assign DResExp = DExpFull[7:0]; assign DResExp = DExpFull[7:0];
logic [10:0] SExp; logic [10:0] SExp;
assign SExp = XExpE-(NormCnt&{8{~XZeroE}})+({11{XDenormE}}&1024-127); assign SExp = XExpE-({2'b0,NormCnt&{9{~XZeroE}}})+({11{XDenormE}}&1024-127);
logic Overflow, Underflow, Inexact; logic Overflow, Underflow, Inexact;
assign Overflow = $signed(DExpFull) >= $signed({1'b0, {8{1'b1}}}) & ~(XNaNE|XInfE); assign Overflow = $signed(DExpFull) >= $signed({5'b0, {8{1'b1}}}) & ~(XNaNE|XInfE);
assign Underflow = (($signed(DExpFull) <= 0) & ((Sticky|Guard|Round) | (XManE[52]&~|DFrac) | (|DFrac&~Denorm)) | ((DExpFull == 1) & Denorm & ~(UfPlus1&UfLSBFrac))) & ~(XNaNE|XInfE); assign Underflow = (($signed(DExpFull) <= 0) & ((Sticky|Guard|Round) | (XManE[52]&~|DFrac) | (|DFrac&~Denorm)) | ((DExpFull == 1) & Denorm & ~(UfPlus1&UfLSBFrac))) & ~(XNaNE|XInfE);
assign Inexact = (Sticky|Guard|Round|Underflow|Overflow) &~(XNaNE); assign Inexact = (Sticky|Guard|Round|Underflow|Overflow) &~(XNaNE);
logic [31:0] DRes; logic [31:0] DRes;
assign DRes = XNaNE ? {XSgnE, XExpE, 1'b1, XManE[50:29]} : assign DRes = XNaNE ? {XSgnE, {8{1'b1}}, 1'b1, XManE[50:29]} :
Underflow & ~Denorm ? {XSgnE, 30'b0, CalcPlus1&(|FrmE[1:0]|Shift)} : Underflow & ~Denorm ? {XSgnE, 30'b0, CalcPlus1&(|FrmE[1:0]|Shift)} :
Overflow | XInfE ? ((FrmE[1:0]==2'b01) | (FrmE[1:0]==2'b10&~XSgnE) | (FrmE[1:0]==2'b11&XSgnE)) & ~XInfE ? {XSgnE, 8'hfe, {23{1'b1}}} : Overflow | XInfE ? ((FrmE[1:0]==2'b01) | (FrmE[1:0]==2'b10&~XSgnE) | (FrmE[1:0]==2'b11&XSgnE)) & ~XInfE ? {XSgnE, 8'hfe, {23{1'b1}}} :
{XSgnE, 8'hff, 23'b0} : {XSgnE, 8'hff, 23'b0} :

2
wally-pipelined/src/fpu/fctrl.sv
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@ -17,7 +17,7 @@ module fctrl (
output logic FWriteIntD // is the result written to the integer register output logic FWriteIntD // is the result written to the integer register
); );
`define FCTRLW 15 `define FCTRLW 14
logic [`FCTRLW-1:0] ControlsD; logic [`FCTRLW-1:0] ControlsD;
// FPU Instruction Decoder // FPU Instruction Decoder
always_comb always_comb

2
wally-pipelined/src/fpu/fma.sv
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@ -172,7 +172,7 @@ module expadd(
// denormalized numbers have diffrent values depending on which precison it is. // denormalized numbers have diffrent values depending on which precison it is.
// double - 1 // double - 1
// single - 1024-128+1 = 897 // single - 1023-127+1 = 897
assign Denorm = FmtE ? 1 : 897; assign Denorm = FmtE ? 1 : 897;
// pick denormalized value or exponent // pick denormalized value or exponent

2
wally-pipelined/src/fpu/fpu.sv
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@ -163,7 +163,7 @@ module fpu (
mux3 #(64) fzemux(FRD3E, FPUResultW, FResM, FForwardZE, FPreSrcZE); mux3 #(64) fzemux(FRD3E, FPUResultW, FResM, FForwardZE, FPreSrcZE);
mux3 #(64) fyaddmux(FPreSrcYE, {{32{1'b1}}, 2'b0, {7{1'b1}}, 23'b0}, mux3 #(64) fyaddmux(FPreSrcYE, {{32{1'b1}}, 2'b0, {7{1'b1}}, 23'b0},
{2'b0, {10{1'b1}}, 52'b0}, {2'b0, {10{1'b1}}, 52'b0},
{FmtE&FOpCtrlE[2]&FOpCtrlE[1]&(FResultSelE==3'b01), ~FmtE&FOpCtrlE[2]&FOpCtrlE[1]&(FResultSelE==3'b01)}, {FmtE&FOpCtrlE[2]&FOpCtrlE[1]&(FResultSelE==2'b01), ~FmtE&FOpCtrlE[2]&FOpCtrlE[1]&(FResultSelE==2'b01)},
FSrcYE); // Force Z to be 0 for multiply instructions FSrcYE); // Force Z to be 0 for multiply instructions
// Force Z to be 0 for multiply instructions // Force Z to be 0 for multiply instructions
mux3 #(64) fzmulmux(FPreSrcZE, 64'b0, FPreSrcYE, {FOpCtrlE[2]&FOpCtrlE[1], FOpCtrlE[2]&~FOpCtrlE[1]}, FSrcZE); mux3 #(64) fzmulmux(FPreSrcZE, 64'b0, FPreSrcYE, {FOpCtrlE[2]&FOpCtrlE[1], FOpCtrlE[2]&~FOpCtrlE[1]}, FSrcZE);