Updated the fpga test bench.

2022-04-01 17:14:47 -05:00 · 2022-04-01 17:14:47 -05:00 · 51dfa16f59
commit 51dfa16f59
parent 48c862d536
3 changed files with 693 additions and 1228 deletions
--- a/pipelined/config/fpga/wally-config.vh
+++ b/pipelined/config/fpga/wally-config.vh
@ -42,6 +42,7 @@
 `define ZIFENCEI_SUPPORTED 1
 `define ZICOUNTERS_SUPPORTED 1
 `define COUNTERS 32
+`define DESIGN_COMPILER 0

 // Microarchitectural Features
 `define UARCH_PIPELINED 1
--- a/pipelined/regression/fpga-wave.do
+++ b/pipelined/regression/fpga-wave.do
--- a/pipelined/testbench/testbench-fpga.sv
+++ b/pipelined/testbench/testbench-fpga.sv