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Added commented out commands to generate saif file from vsim.

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This commit is contained in:
Ross Thompson 2022-02-09 18:40:45 -06:00
parent 7810a09782
commit 4fd0154d03
1 changed files with 5 additions and 1 deletions
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6
pipelined/regression/wally-pipelined.do
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@ -60,9 +60,13 @@ if {$2 eq "buildroot"} {
add log -recursive /* add log -recursive /*
do wave.do do wave.do
# power add generates the logging necessary for saif generation.
#power add -r /dut/core/*
#-- Run the Simulation #-- Run the Simulation
#run 3600
run -all run -all
#power off -r /dut/core/*
#power report -all -bsaif power.saif
noview ../testbench/testbench.sv noview ../testbench/testbench.sv
view wave view wave
} }