forked from Github_Repos/cvw
Set up the divider for on-the-fly conversion
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@ -1 +1 @@
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Subproject commit be67c99bd461742aa1c100bcc0732657faae2230
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Subproject commit 307c77b26e070ae85ffea665ad9b642b40e33c86
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@ -47,7 +47,7 @@ module srt #(parameter Nf=52) (
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input logic Int, // Choose integer inputss
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input logic Int, // Choose integer inputss
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input logic Sqrt, // perform square root, not divide
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input logic Sqrt, // perform square root, not divide
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output logic rsign,
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output logic rsign,
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output logic [Nf-1:0] Quot, Rem, // *** later handle integers
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output logic [Nf-1:0] Quot, Rem, QuotOTFC, // *** later handle integers
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output logic [`NE-1:0] rExp,
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output logic [`NE-1:0] rExp,
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output logic [3:0] Flags
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output logic [3:0] Flags
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);
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);
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@ -91,6 +91,8 @@ module srt #(parameter Nf=52) (
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signcalc signcalc(.XSign, .YSign, .calcSign);
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signcalc signcalc(.XSign, .YSign, .calcSign);
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srtpostproc postproc(rp, rm, Quot);
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srtpostproc postproc(rp, rm, Quot);
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otfc otfc(qp, qz, qm, Quot, QuotOTFC);
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endmodule
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endmodule
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module srtpostproc #(parameter N=52) (
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module srtpostproc #(parameter N=52) (
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@ -210,9 +212,24 @@ module qacc #(parameter N=55) (
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end */
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end */
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endmodule
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endmodule
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//////////
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// otfc //
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//////////
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module otfc #(parameter N=52) (
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input logic qp, qz, qm,
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input logic [N-1:0] Quot,
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output logic [N-1:0] QuotOTFC
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);
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assign QuotOTFC = Quot;
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endmodule
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/////////
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/////////
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// inv //
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// inv //
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/////////
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/////////
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module inv(input logic [55:0] in,
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module inv(input logic [55:0] in,
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output logic [55:0] out);
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output logic [55:0] out);
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@ -44,7 +44,7 @@ module testbench;
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logic [51:0] afrac, bfrac;
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logic [51:0] afrac, bfrac;
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logic [10:0] aExp, bExp;
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logic [10:0] aExp, bExp;
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logic asign, bsign;
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logic asign, bsign;
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logic [51:0] r;
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logic [51:0] r, rOTFC;
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logic [54:0] rp, rm; // positive quotient digits
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logic [54:0] rp, rm; // positive quotient digits
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// Test parameters
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// Test parameters
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@ -72,7 +72,7 @@ module testbench;
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.SrcXFrac(afrac), .SrcYFrac(bfrac),
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.SrcXFrac(afrac), .SrcYFrac(bfrac),
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.SrcA('0), .SrcB('0), .Fmt(2'b00),
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.SrcA('0), .SrcB('0), .Fmt(2'b00),
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.W64(1'b0), .Signed(1'b0), .Int(1'b0), .Sqrt(1'b0),
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.W64(1'b0), .Signed(1'b0), .Int(1'b0), .Sqrt(1'b0),
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.Quot(r), .Rem(), .Flags());
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.Quot(r), .QuotOTFC(rOTFC), .Rem(), .Flags());
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// Counter
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// Counter
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counter counter(clk, req, done);
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counter counter(clk, req, done);
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@ -117,6 +117,13 @@ module testbench;
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$display("failed\n");
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$display("failed\n");
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$stop;
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$stop;
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end
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end
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if (r !== rOTFC) // Check if OTFC works
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begin
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errors = errors+1;
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$display("OTFC is %h, should be %h\n", rOTFC, r);
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$display("failed/n");
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$stop;
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end
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if (afrac === 52'hxxxxxxxxxxxxx)
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if (afrac === 52'hxxxxxxxxxxxxx)
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begin
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begin
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$display("%d Tests completed successfully", testnum);
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$display("%d Tests completed successfully", testnum);
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