forked from Github_Repos/cvw
		
	Removed redundent expression to increase coverage
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				@ -111,7 +111,7 @@ module round(
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  // determine what format the final result is in: int or fp
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  assign IntRes = CvtOp & ToInt;
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  assign IntRes = ToInt;
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  assign FpRes = ~IntRes;
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  // sticky bit calculation
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@ -328,4 +328,4 @@ module round(
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  assign Re = FullRe[`NE-1:0];
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endmodule
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endmodule
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