Debug test case update

This commit is contained in:
David Harris 2023-02-15 06:42:38 -08:00
parent c1d4b0eb14
commit 4414173e7a

View File

@ -5,23 +5,38 @@
.global rvtest_entry_point
rvtest_entry_point:
lui t0, 0x1e # turn on Floating point and XS
lui t0, 0x02 # turn on Floating point and XS
csrs mstatus, t0
# openhwgroup/cvw Issue #55
la a6, begin_signature
la a7, rvtest_data
fadd.d ft0, ft1, ft2
# openhwgroup/cvw Issue #55
fld f4, 0(a7)
fld f9, 8(a7)
# li x1, 0x7ff0000000000001
# sd x1, 0(a6)
# fmv.w.x f4, x1
# li x1, 0x7ff8000000000000
# fmv.w.x f9, x1
fsgnjx.s f12,f9,f4 # expected f 0xffffffff7fc00000
fsgnjx.s f12,f9,f4 # expected f 0xffffffff7fc00000, hdl has been giving fff8000000000000
fsd f12, 0(a6)
# openhwgroup/cvw Issue #56
fld f4, 16(a7)
fld f14, 24(a7)
fsgnjx.s f10,f4,f14 # expected f 0xffffffff7fc00000, hdl has been giving 0xcfa695b1047553b1
fsd f19, 8(a6)
# openhwgroup/cvw Issue #57
fld f0, 32(a7)
fld f15, 40(a7)
fsgnjx.s f30,f0,f15 # expected f 0xfffffffffb3754ef, hdl has been giving 0xffffffff7b3754ef
fsd f30, 16(a6)
# openhwgroup/cvw Issue #58
fld f14, 48(a7)
fclass.s x2, f14 # expected 0x0000000000000200, hdl had been giving 0x0000000000000220
sd x2, 24(a6)
# fsgnjx.s, fclass.s, fsgnjn.s, fsgnj.s, fneg.s, fabs.s, fmv.s all treat inputs as dp rather than sp
#########################
# HTIF and signature
#########################
@ -47,10 +62,14 @@ fromhost:
rvtest_data:
.dword 0x7ff0000000000001
.dword 0x7ff8000000000000
.dword 0xcfa695b1047553b1
.dword 0xffffffff7fc00000
.dword 0xfffffffffb3754ef
.dword 0x7fefffffffffffff
.EQU XLEN,64
begin_signature:
.fill 2*(XLEN/32),4,0xdeadbeef #
.fill 8*(XLEN/32),4,0xdeadbeef #
end_signature:
# Initialize stack with room for 512 bytes