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added sfence to legal instructions, zeroed out rom file to populate for tests

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This commit is contained in:
Kip Macsai-Goren 2021-07-23 15:55:08 -04:00
parent 221b8097d6
commit 381a93b45b
2 changed files with 518 additions and 2 deletions
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512
wally-pipelined/testbench/imperas-boottim.txt Normal file
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@ -0,0 +1,512 @@
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8
wally-pipelined/testbench/testbench-imperas.sv
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@ -51,6 +51,8 @@ module testbench();
string tests64mmu[] = '{
"rv64mmu/WALLY-MMU-SV48", "3000",
"rv64mmu/WALLY-MMU-SV39", "3000"
//"rv64mmu/WALLY-PMA", "3000",
//"rv64mmu/WALLY-PMA", "3000"
};
@ -558,7 +560,7 @@ string tests32f[] = '{
end
end
string signame, memfilename;
string signame, memfilename, romfilename;
logic [31:0] GPIOPinsIn, GPIOPinsOut, GPIOPinsEn;
logic UARTSin, UARTSout;
@ -604,7 +606,9 @@ string tests32f[] = '{
end
// read test vectors into memory
memfilename = {"../../imperas-riscv-tests/work/", tests[test], ".elf.memfile"};
romfilename = {"../../imperas-riscv-tests/imperas-boottim.txt"};
$readmemh(memfilename, dut.uncore.dtim.RAM);
$readmemh(romfilename, dut.uncore.bootdtim.bootdtim.RAM);
ProgramAddrMapFile = {"../../imperas-riscv-tests/work/", tests[test], ".elf.objdump.addr"};
ProgramLabelMapFile = {"../../imperas-riscv-tests/work/", tests[test], ".elf.objdump.lab"};
$display("Read memfile %s", memfilename);
@ -886,7 +890,7 @@ module instrNameDecTB(
else if (imm == 2) name = "URET";
else if (imm == 258) name = "SRET";
else if (imm == 770) name = "MRET";
else if (funct7 == 9) name = "SFENCE.VMA"
else if (funct7 == 9) name = "SFENCE.VMA";
else name = "ILLEGAL";
10'b1110011_001: name = "CSRRW";
10'b1110011_010: name = "CSRRS";