forked from Github_Repos/cvw
Fix HSIZE and HBURST signal widths in PMA checker
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@ -29,12 +29,13 @@
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module pmachecker (
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module pmachecker (
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input logic [31:0] HADDR,
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input logic [31:0] HADDR,
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input logic HSIZE,
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input logic [2:0] HSIZE,
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input logic HWRITE,
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input logic HWRITE,
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input logic HBURST,
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input logic [2:0] HBURST,
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input logic Atomic, Execute, Write, Read,
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input logic Atomic, Execute, Write, Read,
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// *** Add pipeline suffixes
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output logic Cacheable, Idempotent, AtomicAllowed,
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output logic Cacheable, Idempotent, AtomicAllowed,
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output logic SquashAHBAccess,
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output logic SquashAHBAccess,
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@ -56,7 +56,8 @@ module privileged (
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// PMA checker signals
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// PMA checker signals
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input logic [31:0] HADDR,
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input logic [31:0] HADDR,
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input logic HSIZE, HWRITE, HBURST,
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input logic [2:0] HSIZE, HBURST,
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input logic HWRITE,
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input logic Atomic, Execute, Write, Read,
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input logic Atomic, Execute, Write, Read,
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output logic Cacheable, Idempotent, AtomicAllowed,
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output logic Cacheable, Idempotent, AtomicAllowed,
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output logic SquashAHBAccess,
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output logic SquashAHBAccess,
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