Flush uart print statements on \n

2021-05-03 19:25:28 -04:00 · 2021-05-03 19:25:28 -04:00 · 233726e8d8
commit 233726e8d8
parent e145670b15
1 changed files with 1 additions and 0 deletions
--- a/wally-pipelined/src/uncore/uartPC16550D.sv
+++ b/wally-pipelined/src/uncore/uartPC16550D.sv
@ -377,6 +377,7 @@ module uartPC16550D(
          txhrfull <= #1 1;
        end
        $write("%c",Din); // for testbench
+        if (Din == '\n') $flush;
      end
      if (txstate == UART_IDLE) begin // move data into tx shift register if available
        if (fifoenabled) begin