Reduced complexity of pmpadrdec

This commit is contained in:
David Harris 2021-06-23 02:31:50 -04:00
parent fa51ab9f68
commit 2060a5c2f8

View File

@ -30,11 +30,8 @@
`include "wally-config.vh"
module pmpadrdec (
input logic [31:0] HADDR,
input logic [31:0] HADDR, // *** replace with PAdr
input logic [1:0] AdrMode,
// input logic [`XLEN-1:0] PreviousPMPAdr,
input logic [`XLEN-1:0] CurrentPMPAdr,
input logic AdrAtLeastPreviousPMP,
output logic AdrAtLeastCurrentPMP,
@ -45,37 +42,48 @@ module pmpadrdec (
localparam NA4 = 2'b10;
localparam NAPOT = 2'b11;
logic TORMatch, NA4Match, NAPOTMatch;
logic TORMatch, NAMatch;
logic AdrBelowCurrentPMP;
logic [`PA_BITS-1:0] CurrentAdrFull;
logic [`PA_BITS-1:0] FakePhysAdr;
logic [31:0] CurrentAdrFull;
// logic [31:0] PreviousAdrFull;
logic [33:0] Range;
//assign PreviousAdrFull = {PreviousPMPAdr[29:0], 2'b00};
assign CurrentAdrFull = {CurrentPMPAdr[29:0], 2'b00};
// ***replace this when the true physical address from MMU is available
assign FakePhysAdr = {{(`PA_BITS-32){1'b0}}, HADDR};
// Top-of-range (TOR)
// *** Check if this synthesizes
// if not, literally do comparison (HADDR - PreviousAdrFull == 0)
assign AdrBelowCurrentPMP = HADDR < CurrentAdrFull;
// Append two implicit trailing 0's to PMPAdr value
assign CurrentAdrFull = {CurrentPMPAdr[`PA_BITS-3:0], 2'b00};
assign AdrBelowCurrentPMP = /*HADDR */FakePhysAdr < CurrentAdrFull; // *** make sure unsigned comparison works correctly
assign AdrAtLeastCurrentPMP = ~AdrBelowCurrentPMP;
assign TORMatch = AdrAtLeastPreviousPMP && AdrBelowCurrentPMP;
// Naturally aligned four-byte region
// *** need to switch to Physical Address and extend to proper number of bits
assign NA4Match = &(HADDR[31:2] ~^ CurrentAdrFull[31:2]); // check if address matches all but bottom 2 bits;
//adrdec na4dec(HADDR, CurrentAdrFull, (2**2)-1, NA4Match);
// Naturally aligned regions
// *** should be able to optimize away bottom 2 bits
// verilator lint_off UNOPTFLAT
logic [`PA_BITS-1:0] Mask;
genvar i;
// create a mask of which bits to ignore
generate
if (`XLEN == 32 || `XLEN == 64) begin
assign Mask[1:0] = 2'b11;
assign Mask[2] = ~CurrentPMPAdr[0] & (AdrMode == NAPOT); // mask has 0s in upper bis for NA4 region
for (i=3; i < `PA_BITS; i=i+1)
assign Mask[i] = Mask[i-1] & CurrentPMPAdr[i-3]; // NAPOT mask: 1's indicate bits to ignore
endgenerate
// verilator lint_on UNOPTFLAT
assign NAMatch = &((FakePhysAdr ~^ CurrentAdrFull) | Mask);
/* generate
if (`XLEN == 32 || `XLEN == 64) begin // ***redo for various sizes
// priority encoder to translate address to range
// *** We'd like to replace this with a better priority encoder
// *** We should not be truncating 64 bit physical addresses to 32 bits...
// *** there is an easy combinatinoal way to do this with a cascade of AND gates O(32) rather than O(32^2) dh
always_comb
casez (CurrentPMPAdr[31:0])
if (AdrMode == NA4) Range = (2**2) - 1;
else casez (CurrentPMPAdr[31:0]) // NAPOT regions
32'b???????????????????????????????0: Range = (2**3) - 1;
32'b??????????????????????????????01: Range = (2**4) - 1;
32'b?????????????????????????????011: Range = (2**5) - 1;
@ -114,16 +122,15 @@ module pmpadrdec (
end else begin
assign Range = '0;
end
endgenerate
endgenerate
// *** Range should not be truncated... but our physical address space is
// currently only 32 bits wide.
// with a bit of combining of range selection, this could be shared with NA4Match ***
assign NAPOTMatch = &((HADDR ~^ CurrentAdrFull) | Range[31:0]);
assign NAMatch = &((HADDR ~^ CurrentAdrFull) | Range[31:0]);*/
assign Match = (AdrMode == TOR) ? TORMatch :
(AdrMode == NA4) ? NA4Match :
(AdrMode == NAPOT) ? NAPOTMatch :
(AdrMode == NA4 || AdrMode == NAPOT) ? NAMatch :
0;
endmodule