forked from Github_Repos/cvw
Reduced complexity of pmpadrdec
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@ -30,11 +30,8 @@
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`include "wally-config.vh"
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module pmpadrdec (
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input logic [31:0] HADDR,
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input logic [31:0] HADDR, // *** replace with PAdr
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input logic [1:0] AdrMode,
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// input logic [`XLEN-1:0] PreviousPMPAdr,
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input logic [`XLEN-1:0] CurrentPMPAdr,
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input logic AdrAtLeastPreviousPMP,
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output logic AdrAtLeastCurrentPMP,
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@ -45,37 +42,48 @@ module pmpadrdec (
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localparam NA4 = 2'b10;
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localparam NAPOT = 2'b11;
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logic TORMatch, NA4Match, NAPOTMatch;
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logic TORMatch, NAMatch;
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logic AdrBelowCurrentPMP;
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logic [`PA_BITS-1:0] CurrentAdrFull;
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logic [`PA_BITS-1:0] FakePhysAdr;
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logic [31:0] CurrentAdrFull;
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// logic [31:0] PreviousAdrFull;
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logic [33:0] Range;
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//assign PreviousAdrFull = {PreviousPMPAdr[29:0], 2'b00};
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assign CurrentAdrFull = {CurrentPMPAdr[29:0], 2'b00};
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// ***replace this when the true physical address from MMU is available
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assign FakePhysAdr = {{(`PA_BITS-32){1'b0}}, HADDR};
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// Top-of-range (TOR)
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// *** Check if this synthesizes
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// if not, literally do comparison (HADDR - PreviousAdrFull == 0)
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assign AdrBelowCurrentPMP = HADDR < CurrentAdrFull;
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// Append two implicit trailing 0's to PMPAdr value
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assign CurrentAdrFull = {CurrentPMPAdr[`PA_BITS-3:0], 2'b00};
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assign AdrBelowCurrentPMP = /*HADDR */FakePhysAdr < CurrentAdrFull; // *** make sure unsigned comparison works correctly
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assign AdrAtLeastCurrentPMP = ~AdrBelowCurrentPMP;
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assign TORMatch = AdrAtLeastPreviousPMP && AdrBelowCurrentPMP;
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// Naturally aligned four-byte region
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// *** need to switch to Physical Address and extend to proper number of bits
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assign NA4Match = &(HADDR[31:2] ~^ CurrentAdrFull[31:2]); // check if address matches all but bottom 2 bits;
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//adrdec na4dec(HADDR, CurrentAdrFull, (2**2)-1, NA4Match);
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// Naturally aligned regions
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// *** should be able to optimize away bottom 2 bits
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// verilator lint_off UNOPTFLAT
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logic [`PA_BITS-1:0] Mask;
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genvar i;
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// create a mask of which bits to ignore
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generate
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if (`XLEN == 32 || `XLEN == 64) begin
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assign Mask[1:0] = 2'b11;
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assign Mask[2] = ~CurrentPMPAdr[0] & (AdrMode == NAPOT); // mask has 0s in upper bis for NA4 region
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for (i=3; i < `PA_BITS; i=i+1)
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assign Mask[i] = Mask[i-1] & CurrentPMPAdr[i-3]; // NAPOT mask: 1's indicate bits to ignore
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endgenerate
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// verilator lint_on UNOPTFLAT
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assign NAMatch = &((FakePhysAdr ~^ CurrentAdrFull) | Mask);
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/* generate
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if (`XLEN == 32 || `XLEN == 64) begin // ***redo for various sizes
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// priority encoder to translate address to range
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// *** We'd like to replace this with a better priority encoder
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// *** We should not be truncating 64 bit physical addresses to 32 bits...
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// *** there is an easy combinatinoal way to do this with a cascade of AND gates O(32) rather than O(32^2) dh
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always_comb
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casez (CurrentPMPAdr[31:0])
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if (AdrMode == NA4) Range = (2**2) - 1;
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else casez (CurrentPMPAdr[31:0]) // NAPOT regions
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32'b???????????????????????????????0: Range = (2**3) - 1;
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32'b??????????????????????????????01: Range = (2**4) - 1;
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32'b?????????????????????????????011: Range = (2**5) - 1;
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@ -114,16 +122,15 @@ module pmpadrdec (
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end else begin
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assign Range = '0;
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end
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endgenerate
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endgenerate
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// *** Range should not be truncated... but our physical address space is
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// currently only 32 bits wide.
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// with a bit of combining of range selection, this could be shared with NA4Match ***
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assign NAPOTMatch = &((HADDR ~^ CurrentAdrFull) | Range[31:0]);
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assign NAMatch = &((HADDR ~^ CurrentAdrFull) | Range[31:0]);*/
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assign Match = (AdrMode == TOR) ? TORMatch :
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(AdrMode == NA4) ? NA4Match :
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(AdrMode == NAPOT) ? NAPOTMatch :
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(AdrMode == NA4 || AdrMode == NAPOT) ? NAMatch :
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0;
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endmodule
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