forked from Github_Repos/cvw
Added SPDX header to scripts.
This commit is contained in:
Ross Thompson
parent
19966033f1
commit
1b6d5cbbc9
@ -1,8 +1,30 @@
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#!/bin/bash
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# james.stine@okstate.edu 4 Jan 2022
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# Script to run elf2hex for memfile for
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# Imperas and riscv-arch-test benchmarks
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###########################################
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## Written: james.stine@okstate.edu
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## Created: 4 Jan 2022
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## Modified:
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##
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## Purpose: Script to run elf2hex for memfile for
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## Imperas and riscv-arch-test benchmarks
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##
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## A component of the CORE-V-WALLY configurable RISC-V project.
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##
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## Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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##
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## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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##
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## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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## except in compliance with the License, or, at your option, the Apache License version 2.0. You
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## may obtain a copy of the License at
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##
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## https:##solderpad.org/licenses/SHL-2.1/
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##
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## Unless required by applicable law or agreed to in writing, any work distributed under the
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## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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## either express or implied. See the License for the specific language governing permissions
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## and limitations under the License.
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################################################################################################
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for file in work/rv64i_m/*/*.elf ; do
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memfile=${file%.elf}.elf.memfile
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@ -1,9 +1,35 @@
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#!/usr/bin/perl -w
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# exe2memfile.pl
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# David_Harris@hmc.edu 26 November 2020
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# Converts an executable file to a series of 32-bit hex instructions
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# to read into a Verilog simulation with $readmemh
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###########################################
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## exe2memfile.pl
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##
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## Written: David_Harris@hmc.edu
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## Created: 26 November 2020
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## Modified:
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##
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## Purpose: Converts an executable file to a series of 32-bit hex instructions
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## to read into a Verilog simulation with $readmemh
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##
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## A component of the CORE-V-WALLY configurable RISC-V project.
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##
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## Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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##
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## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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##
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## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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## except in compliance with the License, or, at your option, the Apache License version 2.0. You
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## may obtain a copy of the License at
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##
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## https:##solderpad.org/licenses/SHL-2.1/
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##
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## Unless required by applicable law or agreed to in writing, any work distributed under the
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## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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## either express or implied. See the License for the specific language governing permissions
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## and limitations under the License.
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################################################################################################
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#
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#
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use File::stat;
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use IO::Handle;
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@ -1,34 +1,33 @@
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#!/bin/bash
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######################
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# extractFunctionRadix.sh
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#
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# Written: Ross Thompson
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# email: ross1728@gmail.com
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# Created: March 1, 2021
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# Modified: March 10, 2021
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#
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# Purpose: Processes all compiled object files into 2 types of files which assist in debuging applications.
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# File 1: .addr: A sorted list of function starting addresses.
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# When a the PCE is greater than or equal to the function's starting address, the label will be associated with this address.
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# File 2: .lab: A sorted list of funciton labels. The names of functions. Modelsim will display these names rather than the function address.
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#
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# A component of the Wally configurable RISC-V project.
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#
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# Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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#
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# Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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# files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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# modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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# is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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# OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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# BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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# OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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######################
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## extractFunctionRadix.sh
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##
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## Written: Ross Thompson
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## email: ross1728@gmail.com
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## Created: March 1, 2021
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## Modified: March 10, 2021
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##
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## Purpose: Processes all compiled object files into 2 types of files which assist in debuging applications.
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## File 1: .addr: A sorted list of function starting addresses.
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## When a the PCE is greater than or equal to the function's starting address, the label will be associated with this address.
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## File 2: .lab: A sorted list of funciton labels. The names of functions. Modelsim will display these names rather than the function address.
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##
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## Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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##
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## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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##
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## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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## except in compliance with the License, or, at your option, the Apache License version 2.0. You
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## may obtain a copy of the License at
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##
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## https:##solderpad.org/licenses/SHL-2.1/
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##
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## Unless required by applicable law or agreed to in writing, any work distributed under the
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## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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## either express or implied. See the License for the specific language governing permissions
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## and limitations under the License.
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################################################################################################
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function processProgram {
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@ -1,5 +1,30 @@
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#!/usr/bin/python3
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###########################################
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## Written: Ross Thompson ross1728@gmail.com
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## Created: 4 Jan 2022
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## Modified:
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##
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## Purpose: Parses the performance counters from a modelsim trace.
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##
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## A component of the CORE-V-WALLY configurable RISC-V project.
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##
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## Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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##
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## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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##
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## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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## except in compliance with the License, or, at your option, the Apache License version 2.0. You
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## may obtain a copy of the License at
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##
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## https:##solderpad.org/licenses/SHL-2.1/
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##
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## Unless required by applicable law or agreed to in writing, any work distributed under the
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## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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## either express or implied. See the License for the specific language governing permissions
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## and limitations under the License.
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################################################################################################
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import os
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import sys
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import matplotlib.pyplot as plt
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@ -1,8 +1,33 @@
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#!/bin/bash
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# testcount.pl
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# David_Harris@hmc.edu 25 December 2022
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# Read the riscv-test-suite directories from riscv-arch-test
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# and count how many tests are in each
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###########################################
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## testcount.pl
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##
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## Written: David_Harris@hmc.edu
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## Created: 25 December 2022
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## Modified: Read the riscv-test-suite directories from riscv-arch-test
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## and count how many tests are in each
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##
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## Purpose: Read the riscv-test-suite directories from riscv-arch-test
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## and count how many tests are in each
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##
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## A component of the CORE-V-WALLY configurable RISC-V project.
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##
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## Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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##
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## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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##
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## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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## except in compliance with the License, or, at your option, the Apache License version 2.0. You
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## may obtain a copy of the License at
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##
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## https:##solderpad.org/licenses/SHL-2.1/
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##
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## Unless required by applicable law or agreed to in writing, any work distributed under the
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## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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## either express or implied. See the License for the specific language governing permissions
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## and limitations under the License.
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################################################################################################
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for dir in `ls ${WALLY}/addins/riscv-arch-test/riscv-test-suite/rv*/*`
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do
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@ -1,8 +1,33 @@
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#!/bin/perl -W
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# testlist.pl
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# David_Harris@hmc.edu 25 December 2021
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# Read the work directories from riscv-arch-test or imperas-riscv-tests
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# and generate a list of tests and signature addresses for tests.vh
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###########################################
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## testlist.pl
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##
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## Written: David_Harris@hmc.edu
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## Created: 25 December 2021
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## Modified:
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##
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## Purpose: Read the work directories from riscv-arch-test or imperas-riscv-tests
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## and generate a list of tests and signature addresses for tests.vh
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##
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## A component of the CORE-V-WALLY configurable RISC-V project.
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##
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## Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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##
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## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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##
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## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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## except in compliance with the License, or, at your option, the Apache License version 2.0. You
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## may obtain a copy of the License at
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##
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## https:##solderpad.org/licenses/SHL-2.1/
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##
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## Unless required by applicable law or agreed to in writing, any work distributed under the
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## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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## either express or implied. See the License for the specific language governing permissions
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## and limitations under the License.
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################################################################################################
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use strict;
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use warnings;
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@ -1,9 +1,32 @@
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#!/usr/bin/perl -w
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# vclean.pl
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# David_Harris@hmc.edu 7 December 2023
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# Identifies unused signals in Verilog files
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# verilator should do this, but it also reports partially used signals
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###########################################
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## vclean.pl
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##
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## Written: David_Harris@hmc.edu
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## Created: 7 December 2023
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## Modified:
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##
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## Purpose: Identifies unused signals in Verilog files
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## verilator should do this, but it also reports partially used signals
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##
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## A component of the CORE-V-WALLY configurable RISC-V project.
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##
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## Copyright (C) 2021-23 Harvey Mudd College & Oklahoma State University
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##
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## SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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##
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## Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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## except in compliance with the License, or, at your option, the Apache License version 2.0. You
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## may obtain a copy of the License at
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##
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## https:##solderpad.org/licenses/SHL-2.1/
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##
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## Unless required by applicable law or agreed to in writing, any work distributed under the
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## License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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## either express or implied. See the License for the specific language governing permissions
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## and limitations under the License.
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################################################################################################
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use strict;
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@ -1,6 +1,6 @@
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#!/bin/bash
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###########################################
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## cache
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## Tool chain install script.
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##
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## Written: Ross Thompson ross1728@gmail.com
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## Created: 18 January 2023
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