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Added if generate around bp logic only used with performance counters.

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This commit is contained in:
Ross Thompson 2023-02-23 14:39:31 -06:00
parent ed91fc5ce3
commit 195343c84f
1 changed files with 25 additions and 19 deletions
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10
src/ifu/bpred/bpred.sv
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@ -88,9 +88,8 @@ module bpred (
logic BTBTargetWrongE;
logic RASTargetWrongE;
logic JumpOrTakenBranchE;
logic [`XLEN-1:0] BTAD, BTAE, RASPCD, RASPCE;
logic [`XLEN-1:0] BTAD;
// Part 1 branch direction prediction
// look into the 2 port Sram model. something is wrong.
@ -243,6 +242,10 @@ module bpred (
if(`INSTR_CLASS_PRED) mux2 #(`XLEN) pcmuxBPWrongInvalidateFlush(PCE, PCF, BPPredWrongM, NextValidPCE);
else assign NextValidPCE = PCE;
if(`ZICOUNTERS_SUPPORTED) begin
logic JumpOrTakenBranchE;
logic [`XLEN-1:0] BTAE, RASPCD, RASPCE;
// performance counters
// 1. class (class wrong / minstret) (PredictionInstrClassWrongM / csr) // Correct now
// 2. target btb (btb target wrong / class[0,1,3]) (btb target wrong / (br + j + jal)
@ -264,5 +267,8 @@ module bpred (
flopenrc #(`XLEN) RASTargetDReg(clk, reset, FlushD, ~StallD, RASPCF, RASPCD);
flopenrc #(`XLEN) RASTargetEReg(clk, reset, FlushE, ~StallE, RASPCD, RASPCE);
end else begin
assign {BTBPredPCWrongE, RASPredPCWrongE, JumpOrTakenBranchM} = '0;
end
endmodule