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show instruction assembly in waveform

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This commit is contained in:
Noah Boorstin 2021-01-26 12:34:12 -05:00
parent 6c567aab9a
commit 1195ebb468
2 changed files with 6 additions and 2 deletions
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3
wally-pipelined/regression/wally-busybear.do
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@ -40,6 +40,7 @@ view wave
add wave /testbench_busybear/clk add wave /testbench_busybear/clk
add wave /testbench_busybear/reset add wave /testbench_busybear/reset
add wave -divider add wave -divider
add wave -hex /testbench_busybear/PCtext
add wave -hex /testbench_busybear/pcExpected add wave -hex /testbench_busybear/pcExpected
add wave -hex /testbench_busybear/dut/dp/PCF add wave -hex /testbench_busybear/dut/dp/PCF
add wave -hex /testbench_busybear/dut/dp/InstrF add wave -hex /testbench_busybear/dut/dp/InstrF
@ -129,6 +130,6 @@ add wave /testbench_busybear/InstrWName
#set DefaultRadix hexadecimal #set DefaultRadix hexadecimal
# #
#-- Run the Simulation #-- Run the Simulation
run 800 run 900
#run -all #run -all
##quit ##quit

3
wally-pipelined/testbench/testbench-busybear.sv
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@ -126,6 +126,7 @@ module testbench_busybear();
end end
logic [63:0] lastInstrF, lastPC, lastPC2; logic [63:0] lastInstrF, lastPC, lastPC2;
string PCtext, PCtext2;
integer instrs; integer instrs;
initial begin initial begin
instrs = 0; instrs = 0;
@ -140,6 +141,8 @@ module testbench_busybear();
else begin else begin
//if (~speculative) begin //if (~speculative) begin
// first read instruction // first read instruction
scan_file_PC = $fscanf(data_file_PC, "%s %s\n", PCtext, PCtext2);
PCtext = {PCtext, " ", PCtext2};
scan_file_PC = $fscanf(data_file_PC, "%x\n", InstrF); scan_file_PC = $fscanf(data_file_PC, "%x\n", InstrF);
// then expected PC value // then expected PC value
scan_file_PC = $fscanf(data_file_PC, "%x\n", pcExpected); scan_file_PC = $fscanf(data_file_PC, "%x\n", pcExpected);