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cvw/wally-pipelined/regression/sim-wally-arch-batch-rv32ic

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Fixed MTVAL contents during breakpoint. Now all riscv-arch-test vectors pass in rv32 and rv64
2021-09-13 16:40:40 +00:00
vsim -c <<!
do wally-arch.do ../config/rv32ic rv32ic
!
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