forked from Github_Repos/cvw
9 lines
282 B
Plaintext
9 lines
282 B
Plaintext
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#!/bin/bash
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# check for warnings in Verilog code
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# The verilator lint tool is faster and better than Modelsim so it is best to run this first.
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export PATH=$PATH:/usr/local/bin/
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verilator=`which verilator`
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basepath=$(dirname $0)/..
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$verilator --lint-only --top-module fma16 fma16.v
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