forked from Github_Repos/cvw
49 lines
1.9 KiB
Systemverilog
49 lines
1.9 KiB
Systemverilog
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// priority_encoder.sv
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//
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// Written: tfleming@hmc.edu & jtorrey@hmc.edu 7 April 2021
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// Modified:
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//
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// Purpose: One-hot encoding to binary encoder
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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`include "wally-config.vh"
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// *** We should look for a better parameterized priority encoder. This has a
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// bad code smell and might not synthesize
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module priority_encoder #(parameter BINARY_BITS = 3) (
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input [(2**BINARY_BITS)-1:0] one_hot,
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output [BINARY_BITS-1:0] binary
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);
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localparam ONE_HOT_BITS = 2**BINARY_BITS;
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genvar i, j;
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generate
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for (i = 0; i < ONE_HOT_BITS; i++) begin
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for (j = 0; j < BINARY_BITS; j++) begin
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if (i[j]) begin
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assign binary[j] = one_hot[i];
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end
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end
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end
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endgenerate
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endmodule
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