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77 lines
2.9 KiB
Systemverilog
77 lines
2.9 KiB
Systemverilog
///////////////////////////////////////////
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// intdiv_restoring.sv
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//
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// Written: David_Harris@hmc.edu 12 September 2021
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// Modified:
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//
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// Purpose: Restoring integer division using a shift register a subtractor
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
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// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
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// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
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// is furnished to do so, subject to the following conditions:
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//
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// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
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//
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// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
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// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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///////////////////////////////////////////
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`include "wally-config.vh"
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module intdiv_restoring (
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input logic clk,
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input logic reset,
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input logic signedDivide,
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input logic start,
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input logic [`XLEN-1:0] X, D,
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output logic busy, done,
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output logic [`XLEN-1:0] Q, REM
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);
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logic [`XLEN-1:0] W, Win, Wshift, Wprime, Wnext, XQ, XQin, XQshift;
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logic qi; // curent quotient bit
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localparam STEPBITS = $clog2(`XLEN);
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logic [STEPBITS:0] step;
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logic div0;
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// restoring division
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mux2 #(`XLEN) wmux(W, 0, start, Win);
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mux2 #(`XLEN) xmux(0, X, start, XQin);
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assign {Wshift, XQshift} = {Win[`XLEN-2:0], XQin, qi};
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assign {qi, Wprime} = Wshift - D; // subtractor, carry out determines quotient bit
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mux2 #(`XLEN) wrestoremux(Wshift, Wprime, qi, Wnext);
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flopen #(`XLEN) wreg(clk, busy, Wnext, W);
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flopen #(`XLEN) xreg(clk, busy, XQshift, XQ);
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// outputs
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// *** sign extension, handling W instructions
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assign div0 = (D == 0);
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mux2 #(`XLEN) qmux(XQ, {`XLEN{1'b1}}, div0, Q); // Q taken from XQ register, or all 1s when dividing by zero
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mux2 #(`XLEN) remmux(W, X, div0, REM); // REM taken from W register, or from X when dividing by zero
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// busy logic
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always_ff @(posedge clk)
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if (start) begin
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busy = 1; done = 0; step = 0;
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end else if (busy) begin
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step = step + 1;
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if (step[STEPBITS] | div0) begin // *** early terminate on division by 0
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step = 0;
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busy = 0;
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done = 1;
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end
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end else if (done) begin
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done = 0;
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end
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endmodule // muldiv
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