Jacob Pease af2344d2d5 Merge branch 'main' of github.com:openhwgroup/cvw into spiboot		2024-08-06 17:09:39 -05:00
..
artyddr3.ucf	Added more support for Arty A7 board.	2023-04-10 16:01:17 -05:00
constraints-ArtyA7.xdc	Merge branch 'main' of github.com:openhwgroup/cvw into spiboot	2024-08-06 17:09:39 -05:00
constraints-vcu108.xdc	Added sdio_cd to vcu108 constraints. Removed SDC signals from uncore	2023-03-24 17:01:27 -05:00
constraints-vcu118.xdc	Pushed vcu118 to 71MHz.	2023-08-25 17:04:50 -05:00
debug2.xdc	Merge branch 'boot' into mergeBoot	2023-07-21 17:43:45 -05:00
debug4.xdc	Added help option to the flash-sd script.	2023-08-22 13:37:33 -05:00
debug6.xdc	The vcu108 works again. Added renumber.py script that renumbers probes in an xdc file.	2024-05-30 15:48:27 -05:00
marked_debug_all.txt	The vcu108 works again. Added renumber.py script that renumbers probes in an xdc file.	2024-05-30 15:48:27 -05:00
marked_debug_small.txt	Updated artyA7 debugger to match book.	2023-08-21 14:35:42 -05:00
marked_debug.txt	Yay. It's actually working! The FPGA/ImperasDV hybrid is working.	2024-07-10 15:10:37 -05:00
small-debug-rvvi.xdc	Updated for a better ILA rvvi debugger.	2024-07-22 17:44:04 -05:00
small-debug.xdc	Now have configurations to switch between supporting RVVI over ethernet.	2024-07-22 10:51:13 -05:00
vcu-small-debug.xdc	Working new boot process. Buildroot package for sdc.	2023-07-20 14:15:59 -05:00