Kip Macsai-Goren e59490d032 Fixed TLB parameterization and valid bit flop to correctly do instr page faults		2021-07-21 14:44:43 -04:00
..
cache	Replaced FinalReadDataM with ReadDataM in dcache.	2021-07-20 13:27:29 -05:00
ebu	moved subwordread to lsu	2021-07-17 20:37:20 -04:00
fpu	FDIV and FSQRT work	2021-07-21 14:08:14 -04:00
generic	renamed or_rows.sv	2021-07-16 20:17:03 -04:00
hazard	Renamed DCacheStall to LSUStall in hart and hazard.	2021-07-15 10:16:16 -05:00
ieu	Merge branch 'main' into dcache	2021-07-15 11:55:20 -05:00
ifu	hptw: Propagating PageTableEntryF removal through IFU	2021-07-17 15:04:39 -04:00
lsu	Added performance counters for dcache access and dcache miss.	2021-07-19 22:12:20 -05:00
mmu	Fixed TLB parameterization and valid bit flop to correctly do instr page faults	2021-07-21 14:44:43 -04:00
muldiv	Fixed disabling MulDiv when not supported. Started adding generate for FPU unsupported	2021-07-04 19:33:46 -04:00
privileged	Added performance counters for dcache access and dcache miss.	2021-07-19 22:12:20 -05:00
uncore	fix PC checking during InstrPageFault; fix order of S-mode CSR checking; rename peripheral scopes to not be genblk	2021-07-20 17:55:44 -04:00
wally	Added performance counters for dcache access and dcache miss.	2021-07-19 22:12:20 -05:00