cvw/wally-pipelined/src/sdc
2021-12-02 18:00:32 -06:00
..
tb Mostly integrated FPGA flow into main branch. Not all tests passing yet. 2021-12-02 18:00:32 -06:00
clkdivider.sv Merge branch 'main' into fpga 2021-11-29 10:06:53 -06:00
counter.sv Merge branch 'main' into fpga 2021-11-29 10:06:53 -06:00
crc7_pipo.sv Initial SD Card reader. 2021-09-22 10:50:29 -05:00
crc7_sipo_np_ce.sv Initial SD Card reader. 2021-09-22 10:50:29 -05:00
crc16_sipo_np_ce.sv Initial SD Card reader. 2021-09-22 10:50:29 -05:00
piso_generic_ce.sv Initial SD Card reader. 2021-09-22 10:50:29 -05:00
regfile_p2r1w1_nibo.sv Started the AHBLite to SDC interface. 2021-09-22 18:08:38 -05:00
regfile_p2r1w1bwen.sv Initial SD Card reader. 2021-09-22 10:50:29 -05:00
sd_clk_fsm.sv Changed several things. 2021-11-12 11:13:50 -06:00
sd_cmd_fsm.sv Merge branch 'main' into fpga 2021-11-29 10:06:53 -06:00
sd_dat_fsm.sv Have linux booting. Not sure about uart, but uart is now part of the ILA and I can see TX changing. 2021-11-12 17:37:07 -06:00
sd_top_wrapper.v Have linux booting. Not sure about uart, but uart is now part of the ILA and I can see TX changing. 2021-11-12 17:37:07 -06:00
sd_top.sv Merge branch 'main' into fpga 2021-11-29 10:06:53 -06:00
SDC.sv Fixed boot loader program to start at correct address. 2021-10-11 17:22:23 -05:00
simple_timer.sv Fixed lint errors in the SDC. 2021-09-24 12:38:48 -05:00
sipo_generic_ce.sv Initial SD Card reader. 2021-09-22 10:50:29 -05:00
up_down_counter.sv Have linux booting. Not sure about uart, but uart is now part of the ILA and I can see TX changing. 2021-11-12 17:37:07 -06:00