Rose Thompson dc09e1c0c5 Modified names so they don't conflict with FPGA's axi signals.		2024-05-24 16:38:47 -05:00
..
bp-results	Updates to branch predictor collection.	2024-03-29 13:52:28 -05:00
questa	Modified names so they don't conflict with FPGA's axi signals.	2024-05-24 16:38:47 -05:00
slack-notifier
vcs	Code Coverage Text format for each test and configuration in IndividualCovReport	2024-05-08 05:24:24 -07:00
verilator	Fixed wsim to be able to invoke TestFloat with Verilator. However, TestFloat produces incorrect results with Verilator	2024-05-09 18:56:59 -07:00
xcelium	Reorganizing sim directory for multiple simulators	2024-04-05 18:19:46 -07:00
bpred-sim.py	Changes to support concurrent simulation of all the branch predictor sweeps.	2023-11-26 22:19:34 -06:00
buildrootBugFinder.py
coverage	tlbNAPOT hangs due to PBMT making instruction memory uncacheable, and spill logic not working there. Fixed TLBLRU to update recently used on TLBHit rather than CAMHit. Moved coverage exclusions to proper line in pmachecker	2023-09-02 12:56:36 -07:00
FPbuild.txt	Update sim-testfloat to fix errors due to bad config element. I am not sure of the reasoning, but the specific path to the testvector was not getting inserted in Questa. This modification also adds features to test individualized tests (.e.g, binary16 only) -- documentation is added in the FPbuild.txt file	2023-06-20 17:26:54 -05:00
imperas.ic	HPTW coverage improvements	2024-01-26 10:46:38 -08:00
make-tests.sh
Makefile	Fixed makefile and regression-wally so that code coverage now works.	2024-04-16 15:44:42 -05:00
makefile-memfile
run-imperasdv-tests.bash	Revert "Update for new layout of ImperasDV files"	2023-06-13 04:17:56 -07:00
rv64gc_CacheSim.py	Added Wally github address to header comments	2024-01-29 05:38:11 -08:00
test