Rose Thompson d0ae6bf217 Fixed type in fpga Makefile		2024-09-03 10:36:49 -07:00
..
debug
ahbaxibridge.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00
bootrom.txt
clkconverter.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00
ddr3-ArtyA7.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00
ddr4-vcu108.tcl	Updated vcu108 and vcu118 scripts to corrects set the clock speed.	2024-09-03 10:31:55 -07:00
ddr4-vcu118.tcl	Updated vcu108 and vcu118 scripts to corrects set the clock speed.	2024-09-03 10:31:55 -07:00
insert_debug_comment.sh
Makefile	Fixed type in fpga Makefile	2024-09-03 10:36:49 -07:00
mmcm.tcl	Finally worked out that subtle bug in the tcl scripts clock setting.	2024-09-03 10:30:34 -07:00
probe
sysrst.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00
wally.tcl	Improved fpga synth script.	2024-08-27 15:50:05 -07:00
wave_config.wcfg
xlnx_ddr3-artya7-mig.prj
xlnx_ddr4.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00