Rose Thompson 7e16ddd859 Improved fpga synth script.		2024-08-27 15:50:05 -07:00
..
debug
ahbaxibridge.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00
bootrom.txt
clkconverter.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00
ddr3-ArtyA7.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00
ddr4-vcu108.tcl	Updated vc108 constraints for spi based sd card and setting 50 Mhz.	2024-08-23 15:59:11 -07:00
ddr4-vcu118.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00
insert_debug_comment.sh	Maded insert_debug_comment.sh compatible with cygwin.	2024-04-22 10:48:34 -05:00
Makefile	Maybe improvements to fpga synthesis.	2024-08-23 13:00:22 -07:00
mmcm.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00
probe	Update python shebangs to use /usr/bin/env python3 so virtual environment can be used (also aids in general portability)	2024-07-03 20:42:55 -07:00
sysrst.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00
wally.tcl	Improved fpga synth script.	2024-08-27 15:50:05 -07:00
wave_config.wcfg
xlnx_ddr3-artya7-mig.prj
xlnx_ddr4.tcl	More updates to fpga IP module names.	2024-08-22 14:31:39 -07:00