Katherine Parry 18d7fee541 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally		2022-07-12 22:37:20 +00:00
..
slack-notifier	added instructions to slack notifier	2022-05-18 16:50:31 -07:00
wave-dos
wkdir
buildrootBugFinder.py	update to match new filesystem organization	2022-03-26 21:28:32 +00:00
fpga-wave.do	Fixed the SDC clock divider so it actually can work during reset. This will enable the fpga to operate at a faster clock while the SDC is < 10Mhz.	2022-04-04 09:57:26 -05:00
lint-wally
linux-wave.do	small signs of life on new interrupt spoofing	2022-04-08 12:32:30 -07:00
make-tests.sh
Makefile
makefile-memfile
regression-wally	./regression-wally -buildroot or ./regression-wally -all now builds Linux from instruction 0 instead of trying to reach instruction 246000000	2022-06-29 13:40:11 -07:00
sim-buildroot
sim-buildroot-batch
sim-testfloat
sim-testfloat-batch
sim-wally
sim-wally-batch
testfloat.do
wally-harvard.do	Added support for logic memory in the IFU and LSU. This disables the bus interface. Peripherals do not work. Also requires using testbench-harvard.sv. I hope to merge this testbench with the main testbench.sv soon.	2022-01-13 22:21:43 -06:00
wally-pipelined-batch.do	sim-buildroot-batch now runs wally-pipelined-batch	2022-07-06 18:06:43 -07:00
wally-pipelined-fpga.do
wally-pipelined.do
wave-all.do
wave-fpu.do
wave.do