cvw/wally-pipelined/regression
Ross Thompson 619bbd9d83 Merge branch 'bp' into main
Concerns:
1. I don't think the correct data buses are going to the multiplier.
2. I'm not sure the FlushF signal is correct.
2021-03-04 13:35:46 -06:00
..
BTBPredictor.txt Wrote a bash script to generate custom modelsim radix which maps instruction addresses into human readable lables. 2021-02-17 22:20:28 -06:00
regression-wally.py Refactor regression test 2021-02-02 17:22:29 -05:00
sim-wally Added test configurations 2021-01-25 11:28:43 -05:00
sim-wally-batch Added test configurations 2021-01-25 11:28:43 -05:00
twoBitPredictor.txt Wrote a bash script to generate custom modelsim radix which maps instruction addresses into human readable lables. 2021-02-17 22:20:28 -06:00
wally-busybear.do Change busybear test to use work-busybear library 2021-02-03 11:12:47 -05:00
wally-coremark.do Updated coremark .do file for easier debugging 2021-03-03 15:10:39 -06:00
wally-peripherals.do bus rw bugfix and peripherals testing 2021-02-12 00:02:45 -05:00
wally-pipelined-batch-parallel.do Fix intermittent errors caused by weird library stuff 2021-02-02 11:20:09 -05:00
wally-pipelined-batch.do Reorganized src hierarchically 2021-01-30 11:50:37 -05:00
wally-pipelined-ross.do Added FlushF to hazard unit. 2021-02-19 16:36:51 -06:00
wally-pipelined.do Merge branch 'bp' into main 2021-03-04 13:35:46 -06:00
wave-all.do Added FlushF to hazard unit. 2021-02-19 16:36:51 -06:00
wave.do Shreya and I found a bug with the exeuction of JAL and JALR instructions. The link was only set in the writeback stage. Once the branch predictor started correctly predicting JAL(R)s the ALU and forwarding logic need to have the PCLinkE at the execution stage in case an instruction in the next two clocks need the data. 2021-02-26 20:12:27 -06:00