Kip Macsai-Goren 8cde06b886 added basic trap tests that do not pass regression yet. updated signature adresses		2022-03-25 22:57:41 +00:00
..
config	reverted temporary change to configs.	2022-03-22 22:31:34 -05:00
fpu-testfloat/FMA/tbgen	FMA parameterized and FMA testbench reworked	2022-03-19 19:39:03 +00:00
misc	Renamed wally-pipelined to pipelined	2022-01-04 19:47:41 +00:00
regression	Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main	2022-03-04 00:06:27 +00:00
src	I think this version of csri matches what is required in the spec. ExtIntS should not be written into the SEIP register bit.	2022-03-25 13:10:31 -05:00
srt	Renamed unpacking unit to unpack and renamed WriteDataW to ResultW in IEU datapath	2022-02-28 20:50:51 +00:00
testbench	added basic trap tests that do not pass regression yet. updated signature adresses	2022-03-25 22:57:41 +00:00