cvw/pipelined/src/uncore/sdc
Ross Thompson fc22e807e2 Merged testbench-fpga into testbench.
Modified SDC to simplify LimitTimers.  LimitTimers needs to be 0 for implmementation and 1 for simulation.
2022-08-24 17:52:25 -05:00
..
clkdivider.sv Fixed the SDC clock divider so it actually can work during reset. This will enable the fpga to operate at a faster clock while the SDC is < 10Mhz. 2022-04-04 09:57:26 -05:00
crc7_pipo.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
crc7_sipo_np_ce.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
crc16_sipo_np_ce.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
piso_generic_ce.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
proposed-sdc.txt moved proposed-sdc 2022-01-07 12:44:21 +00:00
regfile_p2r1w1_nibo.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
regfile_p2r1w1bwen.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
sd_clk_fsm.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
sd_cmd_fsm.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
sd_dat_fsm.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
sd_top_wrapper.v Renamed wally-pipelined to pipelined 2022-01-04 19:47:41 +00:00
sd_top.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
SDC.sv Merged testbench-fpga into testbench. 2022-08-24 17:52:25 -05:00
SDCcounter.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
simple_timer.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
sipo_generic_ce.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00
up_down_counter.sv Reformatted MIT license to 95 characters 2022-01-07 12:58:40 +00:00