Jacob Pease a34836c08b Commented out references to old axi IP from wally.tcl.		2024-07-24 22:47:15 -05:00
..
debug
bootrom.txt
insert_debug_comment.sh	Maded insert_debug_comment.sh compatible with cygwin.	2024-04-22 10:48:34 -05:00
Makefile	Removed old axi IP from fpga Makefile. Added sed for data.mem file loaded into uncore ram.	2024-07-24 22:46:24 -05:00
probe
wally.tcl	Commented out references to old axi IP from wally.tcl.	2024-07-24 22:47:15 -05:00
wave_config.wcfg
xlnx_ahblite_axi_bridge.tcl
xlnx_axi_clock_converter.tcl
xlnx_axi_crossbar.tcl
xlnx_axi_dwidth_conv_32to64.tcl
xlnx_axi_dwidth_conv_64to32.tcl
xlnx_axi_dwidth_converter.tcl
xlnx_axi_prtcl_conv.tcl
xlnx_ddr3-artya7-mig.prj
xlnx_ddr3-ArtyA7.tcl
xlnx_ddr4-vcu108.tcl
xlnx_ddr4-vcu118.tcl	Pushed vcu118 to 71MHz.	2023-08-25 17:04:50 -05:00
xlnx_ddr4.tcl
xlnx_mmcm.tcl	Reduced Arty A7 clock speed to 20Mhz to support Zicclsm.	2023-11-13 16:44:02 -06:00
xlnx_proc_sys_reset.tcl