Rose Thompson 5b4d3f49b0 Fixed #689 caused by removal of #1 delays. For some reason the #1 were not removed from cacheLRU.sv.		2024-03-26 12:26:03 -05:00
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cache	Fixed #689 caused by removal of #1 delays. For some reason the #1 were not removed from cacheLRU.sv.	2024-03-26 12:26:03 -05:00
ebu	Remove all #delay from non-testbench.	2024-03-16 11:20:32 -07:00
fpu	Remove all #delay from non-testbench.	2024-03-16 11:20:32 -07:00
generic	Remove all #delay from non-testbench.	2024-03-16 11:20:32 -07:00
hazard	Remove all #delay from non-testbench.	2024-03-16 11:20:32 -07:00
ieu	Merge pull request #678 from Karl-Han/latest	2024-03-23 15:18:04 -07:00
ifu	Remove all #delay from non-testbench.	2024-03-16 11:20:32 -07:00
lsu	Shared amoalu max/min comparator hardware and removed input sign extend muxes	2024-03-24 17:15:46 -07:00
mdu	Added Wally github address to header comments	2024-01-29 05:38:11 -08:00
mmu	Revert "Non-ideal fix. Added new output from pma which indicates if the write shift should occur."	2024-03-06 15:16:37 -06:00
privileged	Remove all #delay from non-testbench.	2024-03-16 11:20:32 -07:00
uncore	Remove all #delay from non-testbench.	2024-03-16 11:20:32 -07:00
wally	Merge branch 'main' of https://github.com/openhwgroup/cvw	2024-01-31 13:12:32 -06:00
cvw.sv	Fixed K extension changes	2024-02-28 17:05:08 -06:00