Ross Thompson 55cbd957f0 Added counters to walk through d cache flush.		2021-09-16 17:12:51 -05:00
..
bin	Added testbench-arch for riscv-arch-test suite	2021-09-08 15:59:40 -04:00
config	Added Zfencei support in instruction decoder and configurations. Also added riscv-arch-test 32-bit tests to regression.	2021-09-15 13:14:00 -04:00
fpu-testfloat/FMA/tbgen	FMA cleanup	2021-08-28 10:53:35 -04:00
linux-testgen	created script to determine which functions are most frequently used	2021-09-14 19:41:05 -04:00
misc	Clean up MMU code	2021-05-14 07:12:32 -04:00
ppa	Config file for ppa experiments	2021-03-25 10:23:21 -05:00
regression	Added invalidate to icache.	2021-09-16 16:15:54 -05:00
src	Added counters to walk through d cache flush.	2021-09-16 17:12:51 -05:00
testbench	fix regression	2021-09-15 17:30:59 -04:00
testgen	mcause test fixes and s-mode interrupt bugfix	2021-06-16 17:37:08 -04:00
lint-wally	Merge difficulties	2021-06-07 09:50:23 -04:00