Rose Thompson 4a3cc8b9c8 More progress towards verilator.		2023-12-18 13:26:43 -06:00
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checksignature.sv
DCacheFlushFSM.sv	More progress towards verilator.	2023-12-18 13:26:43 -06:00
functionName.sv	Merge branch 'main' of github.com:ross144/cvw into main	2023-07-11 15:08:26 -05:00
instrNameDecTB.sv
instrTrackerTB.sv
loggers.sv	Fixed Linux makefile; load branch predictor RAMs at startup for sim; fixed comment in trap; starting to make testbench more compatible with Verilator	2023-12-13 11:33:59 -08:00
ramxdetector.sv
riscvassertions.sv	Added ZCA/ZCF/ZCD/ZCB support. Doesn't break regression, but not tested. Need to get tests for Zcb. Draft tests are in riscv-arch-test but not yet committed there	2023-10-04 12:28:12 -07:00
wallyTracer.sv	Updated wallyTracer for Linux boot and wally-batch.do to remove buildroot checkpoint support	2023-11-23 20:36:45 -08:00
watchdog.sv	Fixed regression error of watchdog timeout when PCM is optimized out of the IFU	2023-11-03 04:38:27 -07:00