naichewa 4941fe1769 sync fifo passes		2023-10-16 22:57:02 -07:00
..
cache	Slight modification to cachefsm.	2023-09-05 14:07:58 -05:00
ebu	Improved the critical path even more. The Arty A7 works upto 19Mhz easily. Testing out 22Mhz now.	2023-07-21 16:31:26 -05:00
fpu	Merge pull request #372 from davidharrishmc/dev	2023-07-31 11:28:28 -04:00
generic	Merge branch 'boot' into mergeBoot	2023-07-21 17:43:45 -05:00
hazard	MDU and hazard unit now also parameterized. Based on Lim's work. Again I want to clarify this their work. Not mine. I'm just doing this because the merge had an issue.	2023-05-24 15:01:35 -05:00
ieu	Improved tlb and controller coverage; fixed exclusions on broken lines	2023-08-31 00:27:47 -07:00
ifu	Added ZCA/ZCF/ZCD/ZCB support. Doesn't break regression, but not tested. Need to get tests for Zcb. Draft tests are in riscv-arch-test but not yet committed there	2023-10-04 12:28:12 -07:00
lsu	Added MENVCFG.HADE bit and updated SVADU to depend on this bit	2023-10-04 09:34:28 -07:00
mdu	Merge branch 'main' of https://github.com/openhwgroup/cvw	2023-06-15 15:38:38 -05:00
mmu	transferred spi changes in ECA-authorized commit	2023-10-12 13:36:57 -07:00
privileged	Fixed issue #412	2023-10-09 16:03:37 -05:00
uncore	sync fifo passes	2023-10-16 22:57:02 -07:00
wally	transferred spi changes in ECA-authorized commit	2023-10-12 13:36:57 -07:00
cvw.sv	transferred spi changes in ECA-authorized commit	2023-10-12 13:36:57 -07:00