cvw/sim
2023-06-16 16:43:53 +01:00
..
slack-notifier
wave-dos
bpred-sim.py
buildrootBugFinder.py
coverage-exclusions-rv64gc.do
FPbuild.txt Add notes for FP SoftFloat/TestFloat build as may be vague for some 2023-06-11 15:14:02 -05:00
fpga-wave.do
GetLineNum.do
imperas.ic add changes for latest IDV file layout 2023-06-16 16:43:53 +01:00
lint-wally Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-15 15:38:38 -05:00
linux-wave.do
make-tests.sh
Makefile
makefile-memfile
regression-wally
run-imperas-linux.sh Revert "Update for new layout of ImperasDV files" 2023-06-13 04:17:56 -07:00
run-imperasdv-tests.bash Revert "Update for new layout of ImperasDV files" 2023-06-13 04:17:56 -07:00
rv64gc_CacheSim.py
sim-buildroot
sim-buildroot-batch
sim-imperas Revert "Update for new layout of ImperasDV files" 2023-06-13 04:17:56 -07:00
sim-testfloat
sim-testfloat-batch
sim-wally
sim-wally-batch Merge branch 'main' of https://github.com/openhwgroup/cvw 2023-06-15 15:38:38 -05:00
test
testfloat.do
verilate Changes required to make verilator compile wally's testbench to c++. Not actually tested in simulation yet. 2023-05-31 16:51:00 -05:00
wally-batch.do Moved cvw.sv to src root directory to avoid double-compiling and producing a warning. Adjusted to files to reflect this. 2023-06-14 09:44:52 -07:00
wally-imperas-cov.do add changes for latest IDV file layout 2023-06-16 16:43:53 +01:00
wally-imperas-no-idv.do add changes for latest IDV file layout 2023-06-16 16:43:53 +01:00
wally-imperas.do add changes for latest IDV file layout 2023-06-16 16:43:53 +01:00
wally-linux-imperas.do add changes for latest IDV file layout 2023-06-16 16:43:53 +01:00
wally.do Moved cvw.sv to src root directory to avoid double-compiling and producing a warning. Adjusted to files to reflect this. 2023-06-14 09:44:52 -07:00
wave-all.do
wave-fpu.do
wave.do Updates to wave file. 2023-06-14 10:49:09 -05:00