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35 lines
1.1 KiB
Systemverilog
35 lines
1.1 KiB
Systemverilog
///////////////////////////////////////////////////////////////////////////////
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// Block Name: flag.v
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// Author: David Harris
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// Date: 12/6/1995
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//
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// Block Description:
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// This block generates the flags: invalid, overflow, underflow, inexact.
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/////////////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////////////
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module flag1(xnanE, ynanE, znanE, prodof, prodinfE, nanE);
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/////////////////////////////////////////////////////////////////////////////
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input logic xnanE; // X is NaN
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input logic ynanE; // Y is NaN
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input logic znanE; // Z is NaN
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input logic prodof; // X*Y overflows exponent
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output logic nanE; // Some source is NaN
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// Internal nodes
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output logic prodinfE; // X*Y larger than max possible
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// If any input is NaN, propagate the NaN
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assign nanE = xnanE || ynanE || znanE;
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// Generate infinity checks
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assign prodinfE = prodof && ~xnanE && ~ynanE;
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endmodule
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