Katherine Parry 204e5cb018 fixed synth bugs in fpu		2021-04-19 00:39:16 +00:00
..
cache	Various code syntax changes to bring HDL to a synthesizable level	2021-04-13 11:27:12 -05:00
dmem	Implement support for superpages	2021-04-08 02:44:59 -04:00
ebu	neat verilog thing	2021-04-18 17:48:51 -04:00
fpu	fixed synth bugs in fpu	2021-04-19 00:39:16 +00:00
generic
hazard	Partial fix to the integer divide stall issue.	2021-04-02 15:32:15 -05:00
ieu
ifu	Connect tlb and icache properly	2021-04-15 14:48:39 -04:00
mmu	Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main	2021-04-15 16:20:43 -04:00
muldiv	Various code syntax changes to bring HDL to a synthesizable level	2021-04-13 11:27:12 -05:00
privileged	Add tests for scause and ucause	2021-04-15 19:41:25 -04:00
uncore	working GPIO interrupt demo	2021-04-15 21:09:15 -04:00
wally	Remove imem from testbenches	2021-04-14 20:20:34 -04:00