Ross Thompson 150a73d6cf Set associate icache working, but way 0 is never written.		2021-09-07 12:46:16 -05:00
..
cachereplacementpolicy.sv	Forgot to include a few files in the last few commits.	2021-08-25 22:30:05 -05:00
cacheway.sv	Swapped out the icachemem for cacheway. cacheway is modified to optionally support dirty bits.	2021-08-26 15:43:02 -05:00
dcache_ptw_interaction_README.txt	Modified icache to no longer need StallF in the PCMux logic. Instead this is handled in the icachefsm.	2021-08-27 11:03:36 -05:00
dcache.sv	Swapped out the icachemem for cacheway. cacheway is modified to optionally support dirty bits.	2021-08-26 15:43:02 -05:00
dcachefsm.sv	Forgot to include a few files in the last few commits.	2021-08-25 22:30:05 -05:00
icache.sv	Set associate icache working, but way 0 is never written.	2021-09-07 12:46:16 -05:00
icachefsm.sv	Set associate icache working, but way 0 is never written.	2021-09-07 12:46:16 -05:00
sram1rw.sv	change sram1rw to have a small delay so that we don't have signals changing on clock edges	2021-07-19 11:30:07 -04:00