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61 lines
2.4 KiB
Systemverilog
61 lines
2.4 KiB
Systemverilog
///////////////////////////////////////////
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// watchdog.sv
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//
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// Written: Rose Thompson rose@rosethompson.net
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// Modified: 14 June 2023
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//
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// Purpose: Detects if the processor is stuck and halts the simulation
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//
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// A component of the Wally configurable RISC-V project.
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//
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// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module watchdog #(parameter XLEN, WatchDogTimerThreshold)
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(input clk,
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input reset,
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string TEST
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);
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// check for hang up.
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logic [XLEN-1:0] PCM, PCW, OldPCW;
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integer WatchDogTimerCount;
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logic WatchDogTimeOut;
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flopenr #(XLEN) PCMReg(clk, reset, ~dut.core.ifu.StallM, dut.core.ifu.PCE, PCM); // duplicate PCM register because it is not in ifu for all configurations
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flopenr #(XLEN) PCWReg(clk, reset, ~dut.core.ieu.dp.StallW, PCM, PCW);
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always_ff @(posedge clk) begin
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OldPCW <= PCW;
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if(OldPCW == PCW) WatchDogTimerCount = WatchDogTimerCount + 1'b1;
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else WatchDogTimerCount = 0;
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end
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always_comb begin
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WatchDogTimeOut = WatchDogTimerCount >= WatchDogTimerThreshold;
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if(WatchDogTimeOut) begin
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if (TEST == "buildroot") $display("Watch Dog Time Out triggered. This is a normal termination for a full buildroot boot. Check sim/<simulator>/logs/buildroot_uart.log to check if the boot printed the login prompt.");
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else $display("FAILURE: Watch Dog Time Out triggered. PCW stuck at %x for more than %d cycles", PCW, WatchDogTimerCount);
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`ifdef QUESTA
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$stop; // if this is changed to $finish for Questa, wally-batch.do does not go to the next step to run coverage, and wally.do terminates without allowing GUI debug
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`else
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$finish;
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`endif
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end
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end
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endmodule
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