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Author SHA1 Message Date
DTowersM
0e7630dc03 simplified makefile. Now can call modelsim to run embench runs. Additionally added spike builds to be able to run the embench tests on spike. typing make now builds all necessary files and starts the simulator on the embench 2022-06-06 22:39:22 +00:00
Katherine Parry
b8cff98e48 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-06 16:06:54 +00:00
Katherine Parry
eb93bd46d7 fma synth warnings and errors removed 2022-06-06 16:06:04 +00:00
Ross Thompson
83bca570ae Modified debugger for updated rtl. 2022-06-04 14:39:55 -05:00
slmnemo
3a276f4c39 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-06-03 18:56:29 -07:00
slmnemo
8c3d7b404b Fixed recurrent issue with testbench where it would never stop 2022-06-03 18:56:24 -07:00
cturek
0e308cfccc Added integer division in srt, parametrized everything to work with integers and floating points, parametrized testbench. 2022-06-04 00:14:10 +00:00
Madeleine Masser-Frye
fc1860615f added area, leakage, energy, adjustment by adder width (N/32) 2022-06-03 23:51:34 +00:00
Madeleine Masser-Frye
92d9687ded added combined process regression line 2022-06-03 22:53:03 +00:00
Madeleine Masser-Frye
b1571f7ee9 removing plots and archived runs from repo 2022-06-03 22:15:51 +00:00
DTowersM
23d524b439 testbench now reads begin_signature addr from .objdump.addr instead of from tests.vh 2022-06-03 22:07:14 +00:00
Madeleine Masser-Frye
0ef0c5498a stop tracking runArchive and ppa plots 2022-06-03 22:03:26 +00:00
Madeleine Masser-Frye
f6f561e8fd plots and synth runs 2022-06-03 21:23:04 +00:00
Madeleine Masser-Frye
5a9f1a3970 update 2022-06-03 21:17:50 +00:00
Madeleine Masser-Frye
2383ca4f53 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-06-03 21:08:49 +00:00
Madeleine Masser-Frye
6c6a12cfd5 added muxes and inv, fixed priority encoder 2022-06-03 21:03:13 +00:00
Katherine Parry
b785b6a9bc Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-03 15:34:27 +00:00
Katherine Parry
5ae63f913a fixed compilation errors 2022-06-03 15:34:17 +00:00
slmnemo
0011a1b269 Changed NO_SPOOFING from 0 to 1 in buildroot-no-trace to better facilitate wally booting linux without following QEMU's trace 2022-06-03 04:55:14 -07:00
Katherine Parry
019994c802 removed some debuging code accedentally pushed 2022-06-02 22:45:19 +00:00
Katherine Parry
dfec6bda8a added rv64fpquad 2022-06-02 22:10:00 +00:00
Katherine Parry
39101fcbb3 added config rv64fpquad 2022-06-02 22:09:11 +00:00
David Harris
12399ba924 renamed sim-fp to sim-testfloat 2022-06-02 15:05:29 -07:00
Katherine Parry
b6b3f04af2 added create all vectores file 2022-06-02 21:56:47 +00:00
Katherine Parry
c5bde75e30 added createallvectors 2022-06-02 21:56:05 +00:00
David Harris
66330ca6e9 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-02 20:50:56 +00:00
Katherine Parry
9cc8625ce0 removed fp vectors 2022-06-02 20:50:32 +00:00
David Harris
1175aa1abd Reverted fp testcase ignore 2022-06-02 20:50:23 +00:00
David Harris
7f174310b9 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-02 20:48:34 +00:00
David Harris
08714ca53f mulAdd tests in gitignore 2022-06-02 20:48:14 +00:00
Katherine Parry
43dbbde51f added testvectors fp 2022-06-02 20:48:10 +00:00
slmnemo
b35824eadd Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-06-02 12:54:08 -07:00
Katherine Parry
ccda4c771e fpu paramaterized - except fdivsqrt 2022-06-02 19:50:28 +00:00
slmnemo
568b83a647 Revert "parametrized linux testbench's DEBUG_TRACE and added parameters to relevant calls of the linux testbench in wally-pipelined.do" 
This reverts commit 7d2bfb6db8.
 2022-06-02 12:45:21 -07:00
slmnemo
40abe59d33 Revert "Fixed buildroot by adding a second ." 
This reverts commit 0982417054.
 2022-06-02 12:43:59 -07:00
slmnemo
581c950193 Revert "Added parameter to keep tracking on for buildroot and buildroot-checkpoint in regression.py" 
This reverts commit 05d14bdb3c.
 2022-06-02 12:41:01 -07:00
slmnemo
74319c2af6 Revert "Added parameters for DEBUG_TRACE to buildroot, buildroot-checkpoint, and buildroot-notrace" 
This reverts commit a5490c7096.
 2022-06-02 12:40:46 -07:00
David Harris
9065b684f8 Added stalls for pending SFENCE.VMA and FENCE.I in hazard unit 2022-06-02 09:37:59 -07:00
David Harris
62865d9398 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-02 15:48:36 +00:00
David Harris
7cf5d481c0 Cleaned up comments in controller 2022-06-02 15:48:33 +00:00
David Harris
9cd6b309b4 Cleaned up test cases in testbench 2022-06-02 08:44:28 -07:00
David Harris
129fab3794 Provided sfencevmaM to hazard unit and renamed TLBFlush signals to sfencevma going into LSU/IFU. Preparing for SFENCE.VMA to flush the pipeline, but that is not yet working. 2022-06-02 14:18:55 +00:00
slmnemo
61f077f62c Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-06-02 02:52:03 +00:00
slmnemo
35caa03e46 Updated Linux testbench to use new force/unforce method for Branch predictor init and removed related .txt files 2022-06-02 02:51:51 +00:00
Katherine Parry
74b549ddc8 paramerterized some small fma units 2022-06-01 23:34:29 +00:00
Madeleine Masser-Frye
f550fdb7e7 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally 2022-06-01 21:02:55 +00:00
Madeleine Masser-Frye
9970654e56 fixed errors in synth.out by switching ( to { 2022-06-01 21:02:49 +00:00
DTowersM
4fbce9fc45 Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally into main 2022-06-01 21:00:51 +00:00
DTowersM
d3c8ee7154 added support for embench post processing to testbench.sv 2022-06-01 21:00:44 +00:00
DTowersM
9e4f17fed9 some changes to further support vsim on embench 2022-06-01 17:19:19 +00:00