Commit Graph

5457 Commits

Author SHA1 Message Date
Ross Thompson
57ab5a7488 Simplified gshare. 2023-01-30 19:27:18 -06:00
Ross Thompson
0e29a5f9c2 Minor gshare optimization. 2023-01-30 18:13:12 -06:00
David Harris
6777fd9b55 Restored top-level modules without import statements 2023-01-30 12:54:40 -08:00
David Harris
49e45f45b7 Moved out version of wally using package because synthesis isn't working yet 2023-01-30 12:48:52 -08:00
David Harris
1e7c9f026c Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-01-30 11:00:51 -08:00
David Harris
0c20ac010c Updated Questa to 2022.4_2. 2023-01-30 11:00:41 -08:00
Madeleine Masser-Frye
fa47313086 Merged conflicts in fixing synthesis config/hdl writing (#40)
* Fixed writing config files for synth sweeps

* cleaned up comments

* Fixed copying hdl subdirectories and referencing the correct config files for modified features

* improved readability for synth scripts

* cleans run directory post run and leaves copy of wally-config
2023-01-30 20:54:19 +02:00
Madeleine Masser-Frye
8f635e42c5 Merge branch 'main' of https://github.com/mmasserfrye/cvw 2023-01-30 18:51:05 +00:00
David Harris
5c3e0c8a4d Merge pull request #38 from ross144/main
Imperas found bug with hptw
2023-01-30 10:10:41 -08:00
Ross Thompson
7a4218788c Imperas found a real bug in virtual memory.
If the instruction address spilled across two pages and the second page misses the TLB,
the HPTW received a tlb miss at the address of the first page rather than the second.
After the walk the TLB was updated with the PTE from the first page at the address of the
second page.

Example bug
Instruction PCF = 0x2ffe
First page in 0x2ffe and second page in 0x3000.
The second page misses the TLB and generates HPTW request at 0x2ffe rather than 0x3000.
TLB is updated with PTE from 0x2ffe at 0x3000.
2023-01-30 11:47:51 -06:00
Ross Thompson
3190916601 Merge branch 'main' of github.com:ross144/cvw 2023-01-29 22:39:53 -06:00
Ross Thompson
63267ff378 optimized branch predictor by removing unnecessary registers. 2023-01-29 22:39:37 -06:00
Ross Thompson
d78be868c9 Merge branch 'main' of https://github.com/openhwgroup/cvw into main 2023-01-29 22:19:10 -06:00
David Harris
4c75a90e39 Moved WALLY-status-fp-enabled tests from a to priv suites 2023-01-29 17:19:53 -08:00
David Harris
327303e2e2 Moved shared constants into per-processor config and removed wally-constants 2023-01-29 15:55:37 -08:00
Ross Thompson
dd9d2be89c Updated global history branch predictcor with the gshare improvements. 2023-01-29 16:26:44 -06:00
David Harris
7705209141 Merged PR#37 branch predictor 2023-01-29 14:25:28 -08:00
David Harris
db07c6618b Removed unused TESTSBP parameter 2023-01-29 14:19:24 -08:00
David Harris
54c3a40da5 Merge pull request #37 from ross144/main
Major update to branch predictor
2023-01-29 14:18:31 -08:00
Ross Thompson
a9902337cf Merge branch 'main' of https://github.com/openhwgroup/cvw
This merges the branch predictor improvements into the main repo.
2023-01-29 15:24:20 -06:00
Ross Thompson
7c8b2b685f gshare cleanup. 2023-01-29 15:07:45 -06:00
Ross Thompson
2a336cfb71 Gshare cleanup. 2023-01-29 15:06:35 -06:00
Ross Thompson
244885d3fa Found bug in gshare. 2023-01-29 15:03:25 -06:00
Ross Thompson
5fb3a669b1 Updated benchmark parsing script. 2023-01-29 14:17:45 -06:00
David Harris
2a20d71a12 Missing files related to rv32imc config 2023-01-29 11:40:08 -08:00
David Harris
a099cbb45b Fixed configuration of ram to use macro when depth is corret 2023-01-29 11:35:17 -08:00
David Harris
d6b0a8f9a1 Removed unused wally-harvard.do script 2023-01-29 11:34:35 -08:00
David Harris
f37bae1062 Converted rv32ic to rv32imc 2023-01-29 11:33:54 -08:00
David Harris
47874f1f74 Merge pull request #34 from stineje/main
Update Appendix D + wrapped memories
2023-01-29 07:10:35 -08:00
Ross Thompson
49a7d10914 Fixed typo in testbench branch logger. 2023-01-29 01:00:52 -06:00
Ross Thompson
5c83de4c46 Fixed another bug with the branch logger. 2023-01-29 00:59:59 -06:00
Ross Thompson
6afd7f4fac Fixed bug in the branch logger. 2023-01-29 00:58:50 -06:00
Ross Thompson
250a8df7c3 Updated testbench for branch logger. 2023-01-29 00:56:11 -06:00
Ross Thompson
c8df460b28 Fixed bug with the btb's valid bit not beind held on a stall. 2023-01-29 00:49:23 -06:00
Ross Thompson
9e3074689d Fixed another bug with the speculative gshare with instruction class prediction. 2023-01-29 00:33:40 -06:00
James E. Stine
cef08f3794 Merge pull request #33 from davidharrishmc/dev
Dev
2023-01-28 23:22:27 -06:00
David Harris
0f13941d3b Removed unused BPRED file referenes from fpga config 2023-01-28 20:22:36 -08:00
David Harris
799caef2c9 Renamed BPTYPE to BPRED_TYPE 2023-01-28 20:06:12 -08:00
David Harris
b89fe9989e Renamed DCACHE to DCACHE_SUPPORTED and ICACHE to ICACHE_SUPPORTED 2023-01-28 18:52:00 -08:00
David Harris
fa3643a064 Renamed BUS to BUS_SUPPORTED 2023-01-28 18:35:53 -08:00
David Harris
4883351bd2 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-01-28 18:18:53 -08:00
David Harris
02dc8a7697 Merge pull request #35 from kipmacsaigoren/main
Updated test library to fix test dependence on BP status
2023-01-28 18:18:34 -08:00
David Harris
8a96dcf0ae Config cleanup and renamed BPRED_ENABLED to BPRED_SUPPORTED 2023-01-28 18:17:42 -08:00
David Harris
c73fe4041e Fixed typo in ram2p1r1wbe_1024x69 and renamed for consistency 2023-01-28 18:07:33 -08:00
David Harris
e27ab1a052 Merge branch 'main' of https://github.com/openhwgroup/cvw into dev 2023-01-28 17:55:08 -08:00
James Stine
8b4c3920db Update Appendix D + wrapped memories 2023-01-28 19:46:43 -06:00
James Stine
5a0d8aed23 Modified changes as follows
* Add docs directory for Docker including Dockerfile
* Change to synthesis script to include fpu stuff
* Add wrappers for IP (may need some cleanup but will cleanup shortly)
2023-01-28 19:33:00 -06:00
Kip Macsai-Goren
ee1bcf62ee Fixed regression test dependance on bp status by adding handling of UART tx empty interrupts. 2023-01-28 17:29:35 -08:00
Ross Thompson
6945eaf045 Fixed bug with the new csr. 2023-01-28 17:56:56 -06:00
Ross Thompson
684a7214cb Added another performance counter to track overall branch miss-predictions. 2023-01-28 17:50:46 -06:00