Commit Graph

4246 Commits

Author SHA1 Message Date
David Harris
5ea82cff33 CSA-based completion detection 2022-09-08 14:58:08 -07:00
Ross Thompson
7891d71c2a Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-08 15:55:30 -05:00
Ross Thompson
7f1ae039b0 Optimization. Able to remove hptw address muxes from the E stage. 2022-09-08 15:51:18 -05:00
David Harris
a493b402cb ZMerge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-08 11:38:08 -07:00
David Harris
f326b18af6 embench cleaned up 2022-09-08 11:38:01 -07:00
Ross Thompson
0904951a8c Oups the ahbinterface.sv was accidentally named abhinterface.sv. 2022-09-08 13:21:37 -05:00
Ross Thompson
6e8d97e921 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-07 16:36:51 -05:00
Ross Thompson
f4e3036593 Oups fixed order of ending swap with mux between cache and fetch buffer. 2022-09-07 16:29:47 -05:00
David Harris
2d5e7827df Factored out aplusbeq0 unit 2022-09-07 11:36:35 -07:00
David Harris
c730ddf74a Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-07 11:11:39 -07:00
David Harris
7a29f9c95b Running 16-bit square root cases first in testfloat 2022-09-07 11:11:35 -07:00
Ross Thompson
0615798467 Merge branch 'main' of github.com:davidharrishmc/riscv-wally into main 2022-09-07 12:26:50 -05:00
David Harris
ce6e153b15 Run 16-bit fsqrt tests first 2022-09-07 10:26:09 -07:00
Ross Thompson
83306ec238 Named change for ahb tests to be less annoying. 2022-09-07 12:24:41 -05:00
David Harris
838d98cf4b Preprocessing cleanup 2022-09-07 10:21:27 -07:00
Ross Thompson
3571fb18c2 Modified regression tests to add some ahb configurations. 2022-09-07 12:03:58 -05:00
David Harris
dff9416a33 Added rv32i config for regression of wally32periph 2022-09-07 09:37:59 -07:00
Ross Thompson
5a0cda9860 Merge branch 'multimanager' into main 2022-09-07 10:54:27 -05:00
David Harris
c8e0ea067e Continued simplifying fdivsqrt postprocessing 2022-09-07 07:02:22 -07:00
David Harris
b0ff3a0952 Continued simplifying fdivsqrt postprocessing 2022-09-07 07:00:13 -07:00
David Harris
9e7926e8d7 Moving postprocessing into postproc block 2022-09-07 06:42:37 -07:00
David Harris
c39e71f168 fdivsqrtfsm cleanup 2022-09-07 06:32:07 -07:00
David Harris
027b303b20 fdivsqrtfsm cleanup 2022-09-07 06:27:01 -07:00
David Harris
19e449b83d Fixed regression for divsqrt radix2 2022-09-07 06:12:23 -07:00
Ross Thompson
7ad7cea25b James found a bug in synchronizer. Was not actually back to back flip flops. 2022-09-06 15:06:54 -05:00
Ross Thompson
bc15f6c5e4 Added logic to make burst optional. 2022-09-06 09:21:21 -05:00
Ross Thompson
68a200d728 Added generate around the longer latency version of the ram_ahb.sv 2022-09-06 09:21:03 -05:00
Ross Thompson
20643ffc4a Names changes. 2022-09-05 20:49:35 -05:00
Ross Thompson
2554f96662 Cleaned up hacks to ram. 2022-09-04 14:52:40 -05:00
Ross Thompson
c87268baf1 Modified ram_ahb to work with different latencies. 2022-09-04 14:46:15 -05:00
Ross Thompson
f9daa7f6b9 Progress towards fixing the select HREADY muxing in uncore. 2022-09-04 13:07:49 -05:00
Ross Thompson
221367efb9 Disabled AHB burst mode, which discovered a bug.
Multimanger bug in how back to back requests were arbitrated.
2022-09-03 22:31:41 -05:00
Ross Thompson
787f5bcccb Fixed fpga debug constraints. 2022-09-03 17:36:29 -05:00
cturek
254bb8e0a0 Old changes to old files 2022-09-03 22:09:55 +00:00
Ross Thompson
d601fdf186 Possible fix to AHB burst eviction bug. If HREADY went low during a burst seq the next data phase would only last 1 cycle. 2022-09-02 19:58:41 -05:00
Ross Thompson
00cffb0aa5 Renamed state in buscachefsm to match AHB phases. 2022-09-02 17:17:40 -05:00
Ross Thompson
6f2acf678c Renamed states in busfsm to match AHB phases and book names. 2022-09-02 17:12:36 -05:00
Ross Thompson
6f366c643d Possible fix for AHB trailing ~HREADY bug. 2022-09-02 16:58:35 -05:00
Ross Thompson
3361a06c62 Merge branch 'multimanager' of github.com:davidharrishmc/riscv-wally into multimanager 2022-09-02 16:31:07 -05:00
Ross Thompson
53995c2ed3 update to fpga wave. 2022-09-02 15:54:54 -05:00
Ross Thompson
5d2b299182 Fixed brom1p1r.sv to have fpga preload. 2022-09-02 15:49:50 -05:00
Ross Thompson
c1de88d929 Merge branch 'multimanager' of github.com:davidharrishmc/riscv-wally into multimanager 2022-09-02 13:54:48 -05:00
Ross Thompson
4d60d9a840 Fixed up FPGA constraints.
Added back in the fpga boot rom preload.
2022-09-02 13:54:35 -05:00
David Harris
41448663b9 Initial radix 4 square root debuggin 2022-09-01 16:57:57 -07:00
Ross Thompson
055b55402f clean up subword write. 2022-09-01 17:55:19 -05:00
David Harris
5e26bcced1 Fixed lint errors in square root and improved waveforms in testfloat 2022-09-01 15:49:13 -07:00
Ross Thompson
eae56a890c marked possible improvement to ahb bus fsms. 2022-08-31 23:57:08 -05:00
David Harris
199296dd03 fdiv debug 2022-08-31 14:26:31 -07:00
Ross Thompson
7598fbcb3b Reduced busfsm to 3 states! 2022-08-31 16:11:59 -05:00
Ross Thompson
6f3dad8207 Simplified. 2022-08-31 15:40:56 -05:00