69 Commits

Author	SHA1	Message	Date
naichewa	a08356fdaa	correct exclusion tags and reset testbench	2023-11-01 10:34:39 -07:00
naichewa	0ff9ce527d	Merge branch 'main' into spi	2023-10-16 22:59:50 -07:00
naichewa	4941fe1769	sync fifo passes	2023-10-16 22:57:02 -07:00
David Harris	ac4216b43d	Incorporated new AMO tests from riscv-arch-test	2023-10-16 10:25:45 -07:00
naichewa	d5d4f9d044	transferred spi changes in ECA-authorized commit	2023-10-12 13:36:57 -07:00
David Harris	91429f3f02	Initial TLB NAPOT tests	2023-08-29 12:39:24 -07:00
David Harris	8d3ff59673	Completed basic tests of svnapot and svpbmt	2023-08-28 06:57:35 -07:00
Ross Thompson	cd3349bd26	Added rv32 cboz test.	2023-08-24 17:02:53 -05:00
David Harris	d801916d97	Merge pull request #383 from ross144/main ... Adds Zicbom support for D-cache only. I-cache not yet supported. Tests 32 and 64 bit versions. Please rebuild regressions wally32 and wally64. To save rebuild time edit lines 11-12 of tests/riscof/Makefile	2023-08-21 13:32:00 -07:00
Ross Thompson	310b700550	Have a working 32 bit cbom test!	2023-08-21 13:46:09 -05:00
Ross Thompson	d4c6ba627d	Working CBO tests for 64 bit!	2023-08-21 12:55:07 -05:00
David Harris	2738423441	Improved CSRU coverage with priv.S	2023-08-20 12:49:31 -07:00
David Harris	b04763bcf2	Commented SVADU requirements for wally32priv mmu tests	2023-07-04 11:34:07 -07:00
David Harris	5d6eb40c2d	Fixed embench to run all tests, even ones not in 1.0	2023-06-17 20:38:51 -07:00
David Harris	2db94e7ddd	Replaced zext.h with zext.h_64 in rv64 tests because old one is obsolete	2023-06-16 16:07:28 -07:00
Ross Thompson	664231c0da	Merge branch 'localhistory' ... Repair to wave file. Created implementations of local history. Part of my Ph.D. research.	2023-05-22 10:13:31 -05:00
David Harris	7b0d1a7883	Factored FMA tests out of the main 32/64 f/d tests to run in parallel and speed up sim	2023-05-16 11:37:01 -07:00
Ross Thompson	0904a9b97f	Swapped the m and k parameters for local history predictor.	2023-05-02 10:52:41 -05:00
Kevin Wan	9ca738547e	fixed tests.vh test lines	2023-04-28 07:47:59 -07:00
Kevin Wan	39c9cd5ee9	added tests for pmppriority module	2023-04-27 16:12:43 -07:00
Noah Limpert	4ec31de316	complete camline coverage on IFU and LSU	2023-04-27 14:26:10 -07:00
Noah Limpert	a0e71c26cb	Add in a test that makes match 3 = 0 for all tlb lines	2023-04-20 14:50:06 -07:00
Noah Limpert	7ca44de126	Commiting changes to add coverage to ASID, Global, Megapage size checks.	2023-04-20 14:38:13 -07:00
David Harris	6e612a1693	Update tests.vh ... Missing comma from merge	2023-04-19 06:23:05 -07:00
David Harris	4cbffd7972	Merge branch 'main' into coverage4	2023-04-19 06:16:07 -07:00
David Harris	b63dff098a	Merge branch 'main' into main	2023-04-19 04:50:12 -07:00
David Harris	156a098884	Merge branch 'main' into main	2023-04-19 04:46:51 -07:00
Alec Vercruysse	b3a3af8ed3	add D$ test case to trigger a FlushStage while SetDirtyWay=1 ... This hits some conditional coverage in each cacheway. A cache store hit happens at the same time as a StoreAmoMisalignedFault.	2023-04-19 01:34:01 -07:00
Alec Vercruysse	cd803bfa44	Cover CacheWay edge case: CacheDataMem we=1 while ce=0. ... This test basically triggers an i$ miss during a d$ (hit) store operation. It requires some tricky timing (e.g. a flushD right before the relevant store). I use a script to generate the test.	2023-04-19 01:34:01 -07:00
Liam	9b72d6ac37	Update tests.vh	2023-04-18 23:15:47 -07:00
Kevin Wan	771124e265	Completely covers all PMPCFG_ARRAY_REGW cases	2023-04-18 21:50:48 -07:00
Kevin Wan	1bdae2285d	PMPCFG_ARRAY_REGW cases	2023-04-18 18:43:50 -07:00
Kevin Thomas	db0ca8695a	Add PR#252 test file to coverage	2023-04-18 17:57:56 -05:00
Noah Limpert	d1cb3ca013	git did not seem to add tests.vh, trying again	2023-04-13 16:59:10 -07:00
David Harris	bedb3f95eb	Swapped in svadu mmu tests	2023-04-12 02:06:52 -07:00
Kevin Box	59e7c9371a	Create new pmp tests ... configures all pmpcfg registers in each different address range.	2023-04-09 16:29:57 -07:00
David Harris	b27199e276	Added vm64check tests to cover IMMU vm64	2023-04-07 21:14:52 -07:00
Sydney Riley	4bd3121364	Manual merge in the coverage64gc	2023-03-29 15:25:27 -07:00
Sydney Riley	b0237eaa8b	Starting IFU tests including c.fld compressed instruction	2023-03-29 15:15:47 -07:00
David Harris	3dc1c6673d	Started adding fpu fctrl tests	2023-03-28 21:13:25 -07:00
David Harris	2427e43ffd	Moved rv32 peripheral tests using TEST-LIB to wally32priv because rv32imc doesn't support PMP	2023-03-28 09:08:48 -07:00
David Harris	2e238c15aa	CSRS privileged coverage test	2023-03-28 04:37:56 -07:00
Kip Macsai-Goren	74e0ece891	added working tests back into regression	2023-03-24 11:22:39 -07:00
David Harris	f1e87c5e69	Start of EBU coverage tests	2023-03-24 08:12:02 -07:00
David Harris	4e1bf6fbe0	Improved IEU and bitmanip test coverage	2023-03-23 14:24:41 -07:00
David Harris	121d1cea62	Added csrwrites.S test case for privileged tests	2023-03-23 10:55:32 -07:00
David Harris	ba4e0d2721	Merged bit manip	2023-03-23 06:55:29 -07:00
Kip Macsai-Goren	3a581c95a5	restored arch 64 bit manip tests	2023-03-22 15:45:54 -07:00
Kip Macsai-Goren	da2037f893	restored Imperas test names	2023-03-22 14:11:42 -07:00
David Harris	3b3aa942c7	Added coverage tests to regression coverage	2023-03-22 13:00:10 -07:00